pca9626 NXP Semiconductors, pca9626 Datasheet - Page 22

• Manufacturer Part Number: pca9626
• Description: 24-bit Fm+ I2c-bus 100 Ma 40 V Led Driver
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCA9626_1
Product data sheet
7.4 Active LOW output enable input
7.5 Power-on reset
7.6 Software reset
The active LOW output enable (OE) pin, allows to enable or disable all the LED outputs at
the same time.
The OE pin can be used as a synchronization signal to switch on/off several PCA9626
devices at the same time. This requires an external clock reference that provides blinking
period and the duty cycle.
The OE pin can also be used as an external dimming control signal. The frequency of the
external clock must be high enough not to be seen by the human eye, and the duty cycle
value determines the brightness of the LEDs.
Remark: Do not use OE as an external blinking control signal when internal global
blinking is selected (DMBLNK = 1, MODE2 register) since it will result in an undefined
blinking pattern. Do not use OE as an external dimming control signal when internal global
dimming is selected (DMBLNK = 0, MODE2 register) since it will result in an undefined
dimming pattern.
When power is applied to V
condition until V
PCA9626 registers and I
zeroes) causing all the channels to be deselected. Thereafter, V
0.2 V to reset the device.
The Software Reset Call (SWRST Call) allows all the devices in the I
the power-up state value through a specific formatted I
correctly, it implies that the I
bus.
The SWRST Call function is defined as the following:
1. A START command is sent by the I
2. The reserved SWRST I
3. The PCA9626 device(s) acknowledge(s) after seeing the SWRST Call address
4. Once the SWRST Call address has been sent and acknowledged, the master sends
•
•
When a LOW level is applied to OE pin, all the LED outputs are enabled as defined by
the CHASE register.
When a HIGH level is applied to OE pin, all the LED outputs are high-impedance.
sent by the I
‘0000 0110’ (06h) only. If the R/W bit is set to ‘1’ (read), no acknowledge is returned to
the I
2 bytes with 2 specific values (SWRST data byte 1 and byte 2):
a. Byte 1 = A5h: the PCA9626 acknowledges this value only. If byte 1 is not equal to
b. Byte 2 = 5Ah: the PCA9626 acknowledges this value only. If byte 2 is not equal to
A5h, the PCA9626 does not acknowledge it.
5Ah, then the PCA9626 does not acknowledge it.
2
C-bus master.
DD
2
C-bus master.
has reached V
Rev. 01 — 2 June 2009
2
C-bus state machine are initialized to their default states (all
2
DD
2
C-bus address ‘0000 011’ with the R/W bit set to ‘0’ (write) is
C-bus is functional and that there is no device hanging the
, an internal power-on reset holds the PCA9626 in a reset
POR
. At this point, the reset condition is released and the
2
C-bus master.
24-bit Fm+ I
2
C-bus command. To be performed
2
C-bus 100 mA 40 V LED driver
DD
must be lowered below
2
C-bus to be reset to
PCA9626
© NXP B.V. 2009. All rights reserved.
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