pca9601 NXP Semiconductors, pca9601 Datasheet - Page 10

• Manufacturer Part Number: pca9601
• Description: Dual Bidirectional Bus Buffer
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 6.
T
unless otherwise specified. Typical values are measured at V
[1]
[2]
[3]
[4]
[5]
PCA9601_1
Product data sheet
Symbol Parameter
Buffer response time
V
t
Input capacitance
C
d
amb
CC
i
The maximum static sink current for a standard I
holding the bus LOW. However, when an external device pulls the SX/SY pins below 1.4 V, the PCA9601 may source a current between
0 mA and 1 mA maximum. During contention an external device is required to pull the bus connected to SX or SY down to the 0.4 V
level referenced in the I
Therefore the external pull-up used at SX/SY should be limited to 2 mA. The typical and maximum currents sourced by SX/SY as a
function of junction temperature are shown in
Valid over temperature for V
The input logic threshold is independent of the supply voltage.
The minimum value requirement for pull-up current, 0.3 mA, guarantees that the minimum value for V
the maximum V
IC. While the tolerances on absolute levels allow a small probability, the LOW from one SX output is recognized by an SX input of
another PCA9601, this has no consequences for normal applications. In any design the SX pins of different ICs should never be linked
because the resulting system would be very susceptible to induced noise and would not support all I
The fall time of V
The fall time of V
The rise time of V
The rise time of V
= 5 V; pin TX pull-up resistor = 160 Ω; pin SX pull-up resistor = 2.2 kΩ; no capacitive load
=
−
40
delay time
input capacitance
°
Characteristics
C to +85
SX
TX
SX
TX
SX
input HIGH level to eliminate any possibility of latching. The specified difference is guaranteed by design within any
°
from 5 V to 2.5 V in the test is approximately 10 ns.
from 5 V to 2.5 V in the test is approximately 20 ns.
C unless otherwise specified; voltages are specified with respect to GND with V
from 0 V to 2.5 V in the test is approximately 15 ns.
from 0.7 V to 2.5 V in the test is approximately 25 ns.
[5]
2
C-bus specification. So that device must be able to sink up to 1 mA from SX/SY plus the usual pull-up current.
…continued
CC
≤ 5 V. At higher V
All information provided in this document is subject to legal disclaimers.
Figure
Conditions
V
input between V
threshold, and V
50 % V
V
input between V
threshold, and V
50 % V
V
input between V
threshold, and V
50 % V
V
input between V
threshold, and V
50 % V
effective input capacitance of any
signal pin measured by incremental
bus rise times; guaranteed by
design, not production tested
2
SX
SX
RX
RX
C-bus is 3 mA and PCA9601 is guaranteed to sink 3 mA at SX/SY when those pins are
CC
, this current may increase to maximum −20 μA at V
to V
to V
to V
to V
Rev. 01 — 28 May 2010
10, and the equivalent circuit at the SX/SY interface is shown in
CC
CC
CC
CC
TX
TX
SX
SX
, V
, V
, V
, V
SY
SY
RY
RY
CC
SX
SX
RX
RX
to V
to V
TX
TX
to V
SX
to V
SX
= 5 V and T
= input switching
= input switching
= input switching
= input switching
output falling to
output reaching
output falling to
output reaching
TY
TY
SY
SY
; on falling
; on rising
; on falling
; on rising
amb
= 25
°
C.
Min
-
-
-
-
-
Dual bidirectional bus buffer
2
SX
C-bus operating modes.
CC
output LOW will always exceed
Typ
50
60
100
95
-
= 15 V.
CC
PCA9601
© NXP B.V. 2010. All rights reserved.
= 2.5 V to 15 V
Max
-
-
-
-
10
Figure
4.
10 of 31
Unit
ns
ns
ns
ns
pF