tda9850t-v1 NXP Semiconductors, tda9850t-v1 Datasheet - Page 15

• Manufacturer Part Number: tda9850t-v1
• Description: I2c-bus Controlled Btsc Stereo/sap Decoder
• Manufacturer: NXP Semiconductors

Philips Semiconductors
I
I
Table 1 Explanation of I
Table 2 Definition of the transmitted bytes after read condition
Table 3 Function of the bits in Table 2
The master generates an acknowledge when it has received the first data word, ALR1, then the slave transmits the next
data word ALR2. The master next generates an acknowledge, then slave begins transmitting the first data word ALR1,
and so on until the master generates no acknowledge and transmits a STOP condition.
1995 Jun 19
2
2
S
Standard SLAVE ADDRESS (MAD)
Pin programmable SLAVE ADDRESS
R/W
A
DATA
MA
P
Alignment read 1
Alignment read 2
STP
SAPP
A1X to A2X
A1X
A2X
Y
C-BUS PROTOCOL
C-bus format to read (slave transmits data)
I
2
S
C-bus controlled BTSC stereo/SAP decoder
FUNCTION
SLAVE ADDRESS
NAME
BITS
2
C-bus format to read (slave transmits data)
ALR1
ALR2
BYTE
R/W
MSB
D7
Y
Y
START condition; generated by the master
1011011 pin MAD not connected
1011010 pin MAD connected to ground
1 (read); generated by the master
acknowledge; generated by the slave
slave transmits an 8-bit data word
acknowledge; generated by the master
STOP condition; generated by the master
stereo pilot identification (stereo received = 1)
SAP pilot identification (SAP received = 1)
stereo alignment read data
for wideband expander
for spectral expander
indefinite
SAPP
SAPP
A
D6
15
STP
STP
D5
DATA
A14
A24
D4
DESCRIPTION
FUNCTION
A13
A23
D3
MA
A12
A22
D2
Preliminary specification
DATA
TDA9850
A21
A11
D1
LSB
A10
A20
D0
P