dsp56367 Freescale Semiconductor, Inc, dsp56367 Datasheet - Page 14

• Manufacturer Part Number: dsp56367
• Description: Dsp56367 24-bit Audio Digital Signal Processor
• Manufacturer: Freescale Semiconductor, Inc

Parallel Host Interface (HDI08)
2-10
Signal Name
HOREQ/
HOREQ
HRRQ/
HTRQ/
HACK/
HRRQ
HTRQ
HACK
HA10
PB13
PB14
PB15
HCS
Input, Output, or
Input, Output, or
Input, Output, or
Disconnected
Disconnected
Disconnected
Output
Output
Output
Type
Input
Input
Input
Disconnected
Disconnected
Disconnected
State During
Reset
GPIO
GPIO
GPIO
Table 2-9 Host Interface (continued)
DSP56367 Technical Data, Rev. 2.1
Host Chip Select—When HDI08 is programmed to interface a
nonmultiplexed host bus and the HI function is selected, this signal is the host
chip select (HCS) input. The polarity of the chip select is programmable, but
is configured active-low (HCS) after reset.
Host Address 10—When HDI08 is programmed to interface a multiplexed
host bus and the HI function is selected, this signal is line 10 of the host
address (HA10) input bus.
Port B 13—When the HDI08 is configured as GPIO, this signal is individually
programmed as input, output, or internally disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 3.3V tolerant.
Host Request—When HDI08 is programmed to interface a single host
request host bus and the HI function is selected, this signal is the host request
(HOREQ) output. The polarity of the host request is programmable, but is
configured as active-low (HOREQ) following reset. The host request may be
programmed as a driven or open-drain output.
Transmit Host Request—When HDI08 is programmed to interface a double
host request host bus and the HI function is selected, this signal is the transmit
host request (HTRQ) output. The polarity of the host request is
programmable, but is configured as active-low (HTRQ) following reset. The
host request may be programmed as a driven or open-drain output.
Port B 14—When the HDI08 is configured as GPIO, this signal is individually
programmed as input, output, or internally disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 3.3V tolerant.
Host Acknowledge—When HDI08 is programmed to interface a single host
request host bus and the HI function is selected, this signal is the host
acknowledge (HACK) Schmitt-trigger input. The polarity of the host
acknowledge is programmable, but is configured as active-low (HACK) after
reset.
Receive Host Request—When HDI08 is programmed to interface a double
host request host bus and the HI function is selected, this signal is the receive
host request (HRRQ) output. The polarity of the host request is
programmable, but is configured as active-low (HRRQ) after reset. The host
request may be programmed as a driven or open-drain output.
Port B 15—When the HDI08 is configured as GPIO, this signal is individually
programmed as input, output, or internally disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 3.3V tolerant.
Signal Description
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