dsp56362 Freescale Semiconductor, Inc, dsp56362 Datasheet - Page 43

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dsp56362

Manufacturer Part Number
dsp56362
Description
Dsp56362 24-bit Audio Digital Signal Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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1
2
3
4
5
Freescale Semiconductor
No.
118 TA setup before RD or WR deassertion
119 TA hold after RD or WR deassertion
All timings for 100 MHz are measured from 0.5 Vcc to .05 Vcc
WS is the number of wait states specified in the BCR.
Timings 100, 107 are guaranteed by design, not tested.
Timing 110, 111, and 112, are not specified for 100 MHz.
In the case of TA negation: timing 118 is relative to the deassertion edge of RD or WR were TA to remain active.
AA0–AA3
A0–A17
D0–D23
WR
RD
TA
Table 3-8 SRAM Read and Write Accesses 100 and 120 MHz
Characteristics
113
Figure 3-11 SRAM Read Access
115
DSP56362 Technical Data, Rev. 4
5
Symbol
104
100
105
116
0.25 × T
Expression
119
C
+ 2.0
Data
External Memory Expansion Port (Port A)
2
In
1
Min
4.5
100 MHz
0
(continued)
117
106
118
Max
Min
AA0468
4.1
0.0
120 MHz
Max
Unit
3-17
ns
ns

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