dsp56362 Freescale Semiconductor, Inc, dsp56362 Datasheet - Page 74
dsp56362
Manufacturer Part Number
dsp56362
Description
Dsp56362 24-bit Audio Digital Signal Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56362.pdf
(152 pages)
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Parallel Host Interface (HDI08) Timing
8
9
10
11
3-48
The write data strobe is HWR in the dual data strobe mode and HDS in the single data strobe mode.
The data strobe is host read (HRD) or host write (HWR) in the dual data strobe mode and host data strobe (HDS) in the single
data strobe mode.
The host request is HOREQ in the single host request mode and HRRQ and HTRQ in the double host request mode.
In this calculation, the host request signal is pulled up by a 4.7 kΩ resistor in the open-drain mode.
HD7–HD0
HOREQ
HACK
HRD, HDS
HD0–HD7
HOREQ,
HA0–HA2
HRRQ,
HTRQ
Figure 3-27 Host Interrupt Vector Register (IVR) Read Timing Diagram
HCS
Figure 3-28 Read Timing Diagram, Non-Multiplexed Bus
341
326
336
DSP56362 Technical Data, Rev. 4
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AA0484
Freescale Semiconductor
AA1105
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