saf7129ah NXP Semiconductors, saf7129ah Datasheet - Page 27
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saf7129ah
Manufacturer Part Number
saf7129ah
Description
Saf7129ah Digital Video Encoder
Manufacturer
NXP Semiconductors
Datasheet
1.SAF7129AH.pdf
(56 pages)
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Philips Semiconductors
Table 42 Subaddress 61H
Table 43 Subaddress 62H
2004 Mar 16
Digital video encoder
6 to 0
BIT
BIT
7
6
5
4
3
2
1
0
7
BSTA[6:0]
SYMBOL
SYMBOL
DOWNB
DOWNA
SECAM
SCBW
RTCE
FISE
YGS
INPI
PAL
0 = DACs for R, G and B in normal operational mode
1 = DACs for R, G and B forced to lowest output voltage; default state after reset
0 = DACs for CVBS, Y and C in normal operational mode; default state after reset
1 = DACs for CVBS, Y and C forced to lowest output voltage
0 = PAL switch phase is nominal; default state after reset
1 = PAL switch phase is inverted compared to nominal if RTC is enabled; see Table 43
0 = luminance gain for white
1 = luminance gain for white
0 = no SECAM encoding; default state after reset
1 = SECAM encoding activated; bit PAL has to be set to logic 0
0 = enlarged bandwidth for chrominance encoding (for overall transfer characteristic of
chrominance in baseband representation see Figs 8 and 9)
1 = standard bandwidth for chrominance encoding (for overall transfer characteristic of
chrominance in baseband representation see Figs 8 and 9); default state after reset
0 = NTSC encoding (non-alternating V component)
1 = PAL encoding (alternating V component); default state after reset
0 = 864 total pixel clocks per line; default state after reset
1 = 858 total pixel clocks per line
0 = no real-time control of generated subcarrier frequency; default state after reset
1 = real-time control of generated subcarrier frequency through SAF7113 or SAF7118;
for timing see Fig.22
amplitude of colour burst; input representation in accordance with “ITU-R BT.601” ;
see Table 44
27
black 100 IRE; default state after reset
black 92.5 IRE including 7.5 IRE set-up of black
DESCRIPTION
DESCRIPTION
SAF7129AH
Product specification