saa7146a NXP Semiconductors, saa7146a Datasheet - Page 50

• Manufacturer Part Number: saa7146a
• Description: Multimedia Bridge, High Performance Scaler And Pci Circuit Spci
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 50 Event Counter Threshold set 2 Register (ECT2R)
Note
1. Each of these threshold values shows the limit up to which the related counter will run before it sets it interrupt status
7.8
7.8.1
The real time video interface consists of two bidirectional 8-bit wide ports transporting colour difference samples and
luminance samples in a byte sequential manner. Each of the two video ports (A and B) has its own clock pin, pixel
qualifier and horizontal and vertical sync signal pin. The sync signal can be optionally coded in SAV and EAV codes
according to the D1 standard (SMPTE125M or CCIR 656). The two 8-bit ports can be combined to form a single 16-bit
wide YUV port to be compatible to the DMSD2 output format.
2004 Aug 25
handbook, full pagewidth
F0
OFFSET
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
(HEX)
bit.
VIDEO DATA STREAM
Video processing
D1_A
T
HANDLING
HE REAL TIME VIDEO INTERFACE
VID_a
ECT6 [9:0]
ECT5 [9:0]
ECT4 [11:0] 11 to 0
PXQ_A
NAME
56H
INITIAL SETTINGS OF
DUAL D1 INTERFACE
31 to 22
21 to 12
HS_A
BIT
SIO_a
VS_A
Fig.7 The real time video interface.
RW
RW
RW
52H
TYPE
LLC_A
Event Counter 5 Threshold: this is the threshold for the
fourth 10-bit counter; see note 1
Event Counter 4 Threshold: this is the threshold for the third
10-bit counter; see note 1
Event Counter 3 Threshold: this is the threshold for the
second 12-bit counter; see note 1
50
LLC_B
INITIAL SETTINGS OF
DUAL D1 INTERFACE
VS_B
DESCRIPTION
SIO_b
HS_B
50H
VIDEO DATA STREAM
PXQ_B
Product specification
SAA7146A
HANDLING
VID_b
D1_B
MHB049
54H