saa7146a NXP Semiconductors, saa7146a Datasheet - Page 88
saa7146a
Manufacturer Part Number
saa7146a
Description
Multimedia Bridge, High Performance Scaler And Pci Circuit Spci
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7146A.pdf
(139 pages)
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Table 81 HPS, horizontal fine-scale
7.12.7
Table 82 BCS control
Table 83 Luminance brightness control
Table 84 Luminance contrast control
2004 Aug 25
6C
70
1
1
0
0
0
0
OFFSET
OFFSET
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
(HEX)
(HEX)
D7
D7
BCS
1
0
0
1
1
0
XIM
XP
XSCI
HXO
BRIG
CONT
SATN
D6
D6
NAME
NAME
1
0
0
1
0
0
D5
D5
31
30 to 24
23 to 12
11 to 0
31 to 24
23 to 16
15 to 8
7 to 0
BIT
BIT
1
0
0
1
0
0
D4
D4
RW
RW
RW
RW
RW
RW
RW
TYPE
TYPE
1
0
0
1
0
0
D3
D3
horizontal interpolation mode:
start phase for horizontal fine scaling XP = PHO
(PHOP represents a phase offset with values between ‘0’ and ‘1’,
where the ‘1’ represents a distance between two consecutive
pixels of the input pattern)
X Scaler Increment for fine (phase correct) scaling in
horizontal pixel phase arithmetic:
XSCI = INT [(N
horizontal offset (horizontal start) of input source for HPS, counted
in qualified pixels with PXQ, after selected horizontal sync edge.
luminance brightness control; see Table 83
luminance contrast control; see Table 84
reserved
chrominance saturation control; see Table 85
0: normal mode, sample phase is calculated for every qualified
sample
1: fixed phase, sample phase is fixed to the value set by XP
N
N
OP
IP
= number of qualified scaler input pixels.
88
= number of output pixels
1
0
0
1
0
0
D2
D2
IP
/N
OP
1
0
0
1
0
0
)
D1
D1
1024/(SPSC + 1)]
DESCRIPTION
DESCRIPTION
1
0
0
1
0
0
D0
D0
255 (bright)
128 (CCIR level)
0 (dark)
1.999 (max. contrast)
1 (CCIR level)
0 (luminance off)
Product specification
SAA7146A
P
GAIN
GAIN
128