ade7753 Analog Devices, Inc., ade7753 Datasheet - Page 18

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ade7753

Manufacturer Part Number
ade7753
Description
Active And Apparent Energy Metering Ic With Di/dt Sensor Interface
Manufacturer
Analog Devices, Inc.
Datasheet

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ADE7753
However, despite being internally phase compensated the
ADE7753 must work with transducers which may have
inherent phase errors. For example a phase error of 0.1° to
0.3° is not uncommon for a
These phase errors can vary from part to part and they must
be corrected in order to perform accurate power calculations.
The errors associated with phase mismatch are particularly
noticeable at low power factors. The ADE7753 provides a
means of digitally calibrating these small phase errors. The
ADE7753 allows a small time delay or time advance to be
introduced into the signal processing chain in order to
compensate for small phase errors. Because the compensa-
tion is in time, this technique should only be used for small
phase errors in the range of 0.1° to 0.5°. Correcting large
phase errors using a time shift technique can introduce
significant phase errors at higher harmonics.
The Phase Calibration register (PHCAL[5:0]) is a 2’s
complement signed single byte register which has values
ranging from 21h (-31 in Decimal) to 1Fh (31 in Decimal).
The register is centered at 0Dh, so that writing 0Dh to the
register gives zero delay. By changing the PHCAL register,
the time delay in the Channel 2 signal path can change from
–100.8µs to +33.6µs (CLKIN = 3.579545MHz). One LSB
is equivalent to 2.22µs time delay or advance. With a line
frequency of 60Hz this gives a phase resolution of 0.048° at
the fundamental (i.e., 360°
illustrates how the phase compensation is used to remove a
0.1° phase lead in Channel 1 due to the external transducer.
In order to cancel the lead (0.1°) in Channel 1, a phase lead
must also be introduced into Channel 2. The resolution of the
phase adjustment allows the introduction of a phase lead in
increment of 0.048°. The phase lead is achieved by introduc-
ing a time advance into Channel 2. A time advance of 4.48µs
is made by writing -2 (0Bh) to the time delay block, thus
reducing the amount of time delay by 4.48µs, or equivalently,
a phase lead of approximately 0.1° at line frequency of 60Hz.
0Bh represents -2 because the register is centered with zero
at 0Dh.
V1
V2
V1P
V1N
V2P
V2N
V1
PGA1
PGA2
V2
60Hz
ADC 1
ADC 2
0.18
Figure 27 – Phase Calibration
1
5
0 0 1
-100 s to +34 s
4.48 s / LSB
Delay Block
PHCAL[5:0]
0
PRELIMINARY TECHNICAL DATA
HPF
1
1
2.22µs
CT (Current Transformer).
0
24
V2
60Hz). Figure 27
24
V1
60Hz
0Bh in PHCAL[5:0]
reduced by 4.48 s
(0.18 lead at 60Hz)
LPF2
Channel 2 delay
–18–
ACTIVE POWER CALCULATION
Power is defined as the rate of energy flow from source to
load. It is defined as the product of the voltage and current
waveforms. The resulting waveform is called the instanta-
neous power signal and it is equal to the rate of energy flow
at every instant of time. The unit of power is the watt or joules/
Figure 28 – Combined Phase Response of the HPF & Phase
Figure 29 – Combined Phase Response of the HPF & Phase
Figure 30 – Combined Gain Response of the
-0.05
-0.15
0.15
0.05
-0.1
-0.2
0.2
0.1
-0.1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
40
0
0.18
0.16
0.14
0.12
0.08
0.06
0.04
0.02
0.2
0.1
0
40
Compensation (40Hz to 70Hz)
Compensation (10Hz to 1kHz)
HPF & Phase Compensation
45
45
10
2
50
50
FREQUENCY-Hz
FREQUENCY-Hz
FREQUENCY-Hz
55
55
10
3
60
60
REV. PrF 10/02
65
65
70
10
4
70

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