ml670100 Oki Semiconductor, ml670100 Datasheet - Page 136
ml670100
Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
1.ML670100.pdf
(204 pages)
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9.2
9.2.1
9-4
CSI Control Registers 0,1 (CSInCON, n=0,1)
CSI Control Register n (CSInCON, n=0,1) is an 8-bit read/write register that controls
transmission and reception by Clock Synchronous Serial Interface n (CSIn, n=0,1).
After a system reset, this register contains 0x00.
Always wait for current transmit and receive operations to terminate before modifying the
contents of this register. Modification in the middle of such operations interferes with not only
the current operation, but subsequent operations as well.
Bit Descriptions
CSMSV
This bit configures Clock Synchronous Serial Interface n (CSIn, n=0,1) as master or slave.
Setting this bit to "1" configures the serial port as the master, feeding the clock signal specified
with the CSSFTC field to the CSIn_SCLK (n=0,1) pin and using it to synchronize data
transfers.
Resetting this bit to "0" configures the serial port as a slave using the clock signal from the
CSIn_SCLK (n=0,1) pin to synchronize data transfers.
CSSFTC
This field specifies the synchronization clock for master mode. It is ignored by slave mode.
The choices are half the frequencies of the time base clocks 8TBCCLK, 32TBCCLK, and
128TBCCLK from the Time Base Generator (TBG) and the overflow signal from Flexible
Timer (FTM) channel n (n=0,1).
Control Registers
7
0
6
0
Figure 9.2 : CSI Control Register n (CSInCON, n=0,1)
A "0" indicates a reserved bit. Always write "0" to it.
Writing "1" produces unreliable operation.
5
0
4
0
CSMSV
3
2
0
1
CSSFTC
0
CSSFTC Synchronization clock
00
01
10
11
0
1
Slave mode
Master mode
8TBCCLK/2
32TBCCLK/2
128TBCCLK/2
FTMOVn/2
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