ml670100 Oki Semiconductor, ml670100 Datasheet - Page 16

• Manufacturer Part Number: ml670100
• Description: Ml670100 Is A High-performance 32-bit Microcontroller
• Manufacturer: Oki Semiconductor

1.3.2
1-6
Pin Functions
Table 1.1 lists the functions of each pin.
Table 1.1 : Pin Functions
Type
Address
bus
Data bus
Bus
control
signals
Signal Name Pin
XA23-XA16
XA15-XA0
XD15-XD8
XD7-XD0
nCS0
nCS1
nRD
nWRL
nWRH
nWRE
nLB
nHB
nRAS0
nRAS1
nCASL
nCASH
nWE
Number
66-59
56-49
46-39
88-81
78-71
89
100
90
91
99
91
39
99
96
98
95
97
94
I/O Direction Description
Output
Output
Bi-directional
Bi-directional
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
These are bits 23 - 16 of the external address bus. They
represent secondary functions for I/O port PIO0[7:0].
These are bits 15 - 0 of the external address bus.
These are bits 15 - 8 of the external data bus. They represent
secondary functions for I/O port PIO1[7:0].
These are bits 7 - 0 of the external data bus.
This output is the chip select signal for bank 0.
This output is the chip select signal for bank 1. It represents
a secondary function for I/O port PIO2[6].
This output is the read signal for the SRAM banks (0 and 1).
This output is the Write Enable Low signal for the SRAM
banks (0 and 1).
This output is the Write Enable High signal for the SRAM
banks (0 and 1). It represents a secondary function for I/O
port PIO2[5].
This output is the Write Enable signal for the SRAM banks
(0 and 1).
This output is the Low Byte Select signal for the SRAM
banks (0 and 1).
This output is the High Byte Select signal for the SRAM
banks (0 and 1). It represents a secondary function for I/O
port PIO2[5].
This output is the Row Address Strobe signal for bank 2. It
represents a secondary function for I/O port PIO2[2].
This output is the Row Address Strobe signal for bank 3. It
represents a secondary function for I/O port PIO2[4].
This output is the Column Address Strobe Low signal for the
DRAM banks (2 and 3). It represents a secondary function
for I/O port PIO2[1].
This output is the Column Address Strobe High signal for
the DRAM banks (2 and 3). It represents a secondary
function for I/O port PIO2[3].
This output is the Write Enable signal for the DRAM
banks (2 and 3). It represents a secondary function for
I/O port PIO2[0].