mc68hc908gr8vp Freescale Semiconductor, Inc, mc68hc908gr8vp Datasheet - Page 175
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mc68hc908gr8vp
Manufacturer Part Number
mc68hc908gr8vp
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC908GR8VP.pdf
(286 pages)
- Current page: 175 of 286
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18.7.2 PE1/RxD (Receive Data)
The PE1/RxD pin is the serial data input to the SCI receiver. The SCI shares the PE1/RxD pin with port E.
When the SCI is enabled, the PE1/RxD pin is an input regardless of the state of the DDRE1 bit in data
direction register E (DDRE).
18.8 I/O Registers
These I/O registers control and monitor SCI operation:
18.8.1 SCI Control Register 1
SCI control register 1:
LOOPS — Loop Mode Select Bit
Freescale Semiconductor
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This read/write bit enables loop mode operation. In loop mode the PE1/RxD pin is disconnected from
the SCI, and the transmitter output goes into the receiver input. Both the transmitter and the receiver
must be enabled to use loop mode. Reset clears the LOOPS bit.
1 = Loop mode enabled
0 = Normal operation enabled
SCI control register 1 (SCC1)
SCI control register 2 (SCC2)
SCI control register 3 (SCC3)
SCI status register 1 (SCS1)
SCI status register 2 (SCS2)
SCI data register (SCDR)
SCI baud rate register (SCBR)
Enables loop mode operation
Enables the SCI
Controls output polarity
Controls character length
Controls SCI wakeup method
Controls idle character detection
Enables parity function
Controls parity type
Address:
Reset:
Read:
Write:
LOOPS
$0013
Bit 7
0
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
Figure 18-9. SCI Control Register 1 (SCC1)
ENSCI
6
0
TXINV
5
0
M
4
0
WAKE
3
0
ILTY
2
0
PEN
1
0
Bit 0
PTY
0
I/O Registers
175
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