mc68hc908gr8vp Freescale Semiconductor, Inc, mc68hc908gr8vp Datasheet - Page 191

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mc68hc908gr8vp

Manufacturer Part Number
mc68hc908gr8vp
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
19.3.2 Active Resets from Internal Sources
All internal reset sources actively pull the RST pin low for 32 CGMXCLK cycles to allow resetting of
external peripherals. The internal reset signal IRST continues to be asserted for an additional 32 cycles
at which point the reset vector will be fetched. See
illegal address, illegal opcode, COP timeout, LVI, or POR. See
The COP reset is asynchronous to the bus clock.
The active reset feature allows the part to issue a reset to peripherals and other chips within a system
built around the MCU.
Freescale Semiconductor
CGMOUT
RST
IAB
For LVI or POR resets, the SIM cycles through 4096 + 32 CGMXCLK cycles
during which the SIM forces the RST pin low. The internal reset signal then
follows the sequence from the falling edge of RST shown in
CGMXCLK
IRST
RST
IAB
PC
Reset Recovery
All others
POR/LVI
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
Figure 19-6. Sources of Internal Reset
RST PULLED LOW BY MCU
ILLEGAL ADDRESS RST
Figure 19-4. External Reset Timing
Figure 19-5. Internal Reset Timing
ILLEGAL OPCODE RST
Table 19-2. PIN Bit Set Timing
32 CYCLES
MODRST
COPRST
POR
LVI
NOTE
Figure
Actual Number of Cycles
19-5. An internal reset can be caused by an
4163 (4096 + 64 + 3)
INTERNAL RESET
32 CYCLES
67 (64 + 3)
Figure
VECT H
19-6.
VECT L
Figure
VECTOR HIGH
Reset and System Initialization
19-5.
191

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