mc68hc908gr8vp Freescale Semiconductor, Inc, mc68hc908gr8vp Datasheet - Page 183
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mc68hc908gr8vp
Manufacturer Part Number
mc68hc908gr8vp
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC908GR8VP.pdf
(286 pages)
- Current page: 183 of 286
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RPF — Reception in Progress Flag Bit
18.8.6 SCI Data Register
The SCI data register (SCDR) is the buffer between the internal data bus and the receive and transmit
shift registers. Reset has no effect on data in the SCI data register.
R7/T7–R0/T0 — Receive/Transmit Data Bits
18.8.7 SCI Baud Rate Register
The baud rate register (SCBR) selects the baud rate for both the receiver and the transmitter.
Freescale Semiconductor
This read-only bit is set when the receiver detects a 0 during the RT1 time period of the start bit search.
RPF does not generate an interrupt request. RPF is reset after the receiver detects false start bits
(usually from noise or a baud rate mismatch) or when the receiver detects an idle character. Polling
RPF before disabling the SCI module or entering stop mode can show whether a reception is in
progress.
Reading address $0018 accesses the read-only received data bits, R7:R0. Writing to address $0018
writes the data to be transmitted, T7:T0. Reset has no effect on the SCI data register.
1 = Reception in progress
0 = No reception in progress
Address:
Address:
Do not use read/modify/write instructions on the SCI data register.
Reset:
Reset:
Read:
Read:
Write:
Write:
$0018
$0019
Bit 7
Bit 7
R7
T7
0
0
Figure 18-16. SCI Baud Rate Register (SCBR)
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
= Unimplemented
Figure 18-15. SCI Data Register (SCDR)
R6
T6
6
6
0
0
SCP1
R5
T5
5
5
0
NOTE
Unaffected by reset
SCP0
R4
T4
4
4
0
R3
T3
R
R
3
3
0
= Reserved
SCR2
R2
T2
2
2
0
SCR1
R1
T1
1
1
0
SCR0
Bit 0
Bit 0
R0
T0
0
I/O Registers
183
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