mc68hc908lj24 Freescale Semiconductor, Inc, mc68hc908lj24 Datasheet - Page 136

• Manufacturer Part Number: mc68hc908lj24
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Clock Generator Module (CGM)
Data Sheet
136
The most critical parameter which affects the reaction times of the PLL
is the reference frequency, f
detector and controls how often the PLL makes corrections. For stability,
the corrections must be small compared to the desired frequency, so
several corrections are required to reduce the frequency error.
Therefore, the slower the reference the longer it takes to make these
corrections. This parameter is under user control via the choice of crystal
frequency f
(See
Reference Divider Select
Another critical parameter is the external filter network. The PLL
modifies the voltage on the VCO by adding or subtracting charge from
capacitors in this network. Therefore, the rate at which the voltage
changes for a given frequency error (thus change in charge) is
proportional to the capacitance. The size of the capacitor also is related
to the stability of the PLL. If the capacitor is too small, the PLL cannot
make small enough adjustments to the voltage and the system cannot
lock. If the capacitor is too large, the PLL may not be able to adjust the
voltage in a reasonable time. (See
Also important is the operating voltage potential applied to V
power supply potential alters the characteristics of the PLL. A fixed value
is best. Variable supplies, such as batteries, are acceptable if they vary
within a known range at very slow speeds. Noise on the power supply is
not acceptable, because it causes small frequency errors which
continually change the acquisition time of the PLL.
Temperature and processing also can affect acquisition time because
the electrical characteristics of the PLL change. The part operates as
specified as long as these influences stay within the specified limits.
External factors, however, can cause drastic changes in the operation of
the PLL. These factors include noise injected into the PLL through the
filter capacitor, filter capacitor leakage, stray impedances on the circuit
board, and even humidity or circuit board contamination.
8.4.3 PLL
Clock Generator Module (CGM)
XCLK
Circuits,
and the R value programmed in the reference divider.
8.4.6 Programming the
Register.)
RDV
. This frequency is the input to the phase
8.9.3 Choosing a
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
PLL, and
Filter.)
DDA
8.6.5 PLL
. The