mc68hc908lj24 Freescale Semiconductor, Inc, mc68hc908lj24 Datasheet - Page 164

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mc68hc908lj24

Manufacturer Part Number
mc68hc908lj24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Monitor ROM (MON)
10.2 Introduction
10.3 Features
Data Sheet
164
This section describes the monitor ROM (MON) and the monitor mode
entry methods. The monitor ROM allows complete testing of the MCU
through a single-wire interface with a host computer. Monitor mode entry
can be achieved without use of the higher test voltage, V
vector addresses $FFFE and $FFFF are blank, thus reducing the
hardware requirements for in-circuit programming.
In addition, to simplify user coding, routines are also stored in the
monitor ROM area for FLASH memory program /erase and EEPROM
emulation.
Features of the monitor ROM include:
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or
copying the FLASH difficult for unauthorized users.
Normal user-mode pin functionality
One pin dedicated to serial communication between monitor ROM
and host computer
Standard mark/space non-return-to-zero (NRZ) communication
with host computer
Execution of code in RAM or FLASH
FLASH memory security feature
FLASH memory programming interface
Enhanced PLL (phase-locked loop) option to allow use of external
32.768-kHz crystal to generate internal frequency of 2.4576 MHz
959 bytes monitor ROM code size
($FC00–$FDFF and $FE10–$FFCE)
Monitor mode entry without high voltage, V
blank ($FFFE and $FFFF contain $FF)
Standard monitor mode entry if high voltage, V
IRQ
Resident routines for in-circuit programming and EEPROM
emulation
Monitor ROM (MON)
1
MC68HC908LJ24/LK24 — Rev. 2.1
TST
Freescale Semiconductor
, if reset vector is
TST
TST
, is applied to
, as long as

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