mc68hc05pl4b Freescale Semiconductor, Inc, mc68hc05pl4b Datasheet - Page 18

• Manufacturer Part Number: mc68hc05pl4b
• Description: Low-cost Single-chip Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

GENERAL RELEASE SPECIFICATION
2.2
2.3
2.4
2.5
2-2
I/O REGISTERS
The rst 32 addresses of the memor y space, $0000-$001F, are the I/O section.
One I/O register is located outside the 32-byte I/O section, which is the Computer
Operating Properly (COP) register mapped at $1FF0.
The bit assignment of each I/O register is described in the respective sections and
summarized in Figure 2-3 and Figure 2-4 .
RAM
The 256 addresses from $0020 to $01FF serve as both user RAM and the stack
RAM. The CPU uses v e RAM bytes to save all CPU register contents before pro-
cessing an interrupt. During a subroutine call, the CPU uses two bytes to store the
return address. The stack pointer decrements during pushes and increments dur-
ing pulls.
Be careful when using nested subroutines or multiple interrupt levels. The CPU
may overwrite data in the RAM during a subroutine or during the interrupt stacking
operation.
ROM
The 4096 bytes of user ROM is located from address $0E00 to $1DFF.
Addresses $1FF0 to $1FFF contain 16 bytes of ROM reserved for user vectors.
COP WATCHDOG REGISTER (COPR)
Writing “0” to the COPC bit in the COP watchdog register ($1FF0) resets the COP
watchdog timer. This is a write only register; writing a “1” to COPC has no effect.
RESET
COPR
$1FF0
W
R
BIT 7
U
Freescale Semiconductor, Inc.
Figure 2-2. COP Watchdog Register (COPR)
For More Information On This Product,
BIT 6
U
Go to: www.freescale.com
BIT 5
April 30, 1998
U
MEMORY
NOTE
BIT 4
U
BIT 3
U
BIT 2
U
BIT 1
U
MC68HC05PL4
COPC
REV 2.0
BIT 0
U