mc68hc05pl4b Freescale Semiconductor, Inc, mc68hc05pl4b Datasheet - Page 35

• Manufacturer Part Number: mc68hc05pl4b
• Description: Low-cost Single-chip Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

5.3.1 Power-On Reset (POR)
5.3.2 Computer Operating Properly (COP) Reset
MC68HC05PL4
REV 2.0
The internal POR is generated on power-up to allow the clock oscillator to stabi-
lize. The POR is strictly for power turn-on conditions and is not able to detect a
drop in the power supply voltage (brown-out). There is an oscillator stabilization
delay of 4064 internal processor bus clock cycles after the oscillator becomes
active.
The POR will generate the RST signal which will reset the CPU. If any other reset
function is active at the end of the 4096 cycle delay, the RST signal will remain in
the reset condition until the other reset condition(s) end.
POR will not activate the pulldown device on the RESET pin. V
below V
The COP watchdog system consist of a divide by 8 counter with clock source from
the 8-bit Timer (Timer8). Hence, a COP watchdog time-out occurs on the 8th
Timer8 clock pulse. A COP watchdog time-out generates a COP reset to the CPU.
Figure 5-3 shows a block diagram of the COP watchdog logic.
The COP watchdog is part of a software error detection system and must be
cleared periodically to start a new time-out period. To clear the COP watchdog
and prevent a COP reset, write a logic “1” to the COPC bit in the COP register at
location $1FF0. The COP register, shown in Figure 5-4, is a write-only register
that returns the content of a ROM location when read.
COPC — COP Clear
From Timer8 Counter
RESET
COPR
$1FF0
COPC is a write-only bit. Periodically writing a logic one to COPC prevents the
COP watchdog from resetting the MCU. Reset clears the COPC bit.
1 = Reset COP watchdog timer.
0 = No effect on COP watchdog timer.
POR
COPON
W
R
Write “1” to COPC
in order for the internal POR circuit to detect the next rise of V
BIT 7
U
Figure 5-3. COP Watchdog Block Diagram
Freescale Semiconductor, Inc.
Figure 5-4. COP Watchdog Register (COPR)
For More Information On This Product,
BIT 6
U
Go to: www.freescale.com
Logic
BIT 5
April 30, 1998
8 Counter
U
R
RESETS
BIT 4
U
S
From Reset Logic
Latch
GENERAL RELEASE SPECIFICATION
R
BIT 3
U
COP Reset
BIT 2
U
To Reset Logic
BIT 1
DD
U
must drop
DD
COPC
BIT 0
.
U
5-3