mc68hc05pl4b Freescale Semiconductor, Inc, mc68hc05pl4b Datasheet - Page 46

• Manufacturer Part Number: mc68hc05pl4b
• Description: Low-cost Single-chip Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

GENERAL RELEASE SPECIFICATION
7.1.1 Port Data Registers
7.1.2 Port Data Direction Registers
7.2
7-2
Each port I/O pin has a corresponding bit in the Port Data Register. When a port
I/O pin is programmed as an output the state of the corresponding data register bit
determines the state of the output pin.
When a port pin is programmed as an input, any read of the Port Data Register
will return the logic state of the corresponding I/O pin. The locations of the Data
Registers for Port A, B, and C are at $0000, $0001 and $0002. The Port Data
Registers are unaffected by reset.
Each port I/O pin may be programmed as an input by clearing the corresponding
bit in the DDR, or programmed as an output by setting the corresponding bit in the
DDR. The DDR for Port A, B, and C are located at $0005, $0006 and $0007. The
DDRs are cleared by reset.
A “glitch” can be generated on an I/O pin when changing it from an input to an
output unless the data register is rst preconditioned to the desired state bef ore
changing the corresponding DDR bit from a zero to a one.
PORT A
Port A is an 7-bit bidirectional port, with pins shared with other modules. The
Port A Data Register is at address $0000 and the Data Direction Register is at
address $0005. Port pins PA5 and PA6 are high current sink pins; see Electrical
Speci cations section f or values.
Pin PA0 is only available on MC68HC05PL4. OSC2 replaces PA0 on
MC68HC05PL4B.
Pin PA1 becomes the DTMF output from the DAC when the DACEN bit is set in
the DAC Control and Data Register ($000F).
Pins PA2 and PA3 become the 16-bit timer TCAP and TCMP respectively, when
TCAPEN and TCMPEN are set in the Miscellaneous Control/Status Register
($001C).
R/W
0
0
1
1
DDR
0
1
0
1
Freescale Semiconductor, Inc.
The I/O pin is in input mode. Data is written into the output data latch.
For More Information On This Product,
Data is written into the output data latch and output to the I/O pin.
The I/O pin is in an output mode. The output data latch is read.
Table 7-1. I/O Pin Functions
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INPUT/OUTPUT PORTS
April 30, 1998
The state of the I/O pin is read.
I/O Pin Functions
NOTE
MC68HC05PL4
REV 2.0