mc68hc05pl4b Freescale Semiconductor, Inc, mc68hc05pl4b Datasheet - Page 57

• Manufacturer Part Number: mc68hc05pl4b
• Description: Low-cost Single-chip Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

MC68HC05PL4
REV 2.0
OCRH
RESET
R/W
The planned action on the TCMP depends on the value stored in the OLVL bit in
the TCR, and it occurs when the value of the 16-bit free-running timer counter
matches the value in the output compare registers shown in Figure 9-3. These
registers are read/write bits and are unaffected by reset.
Writing to the OCRH before writing to the OCRL inhibits timer compares until the
OCRL is written. Reading or writing to the OCRL after reading the TCR will clear
the output compare ag bit (OCF). The output compare OLVL state will be clocked
to its output latch regardless of the state of the OCF.
To prevent OCF from being set between the time it is read and the time the output
compare registers are updated, use the following procedure:
OCRH
$0016
OCRL
$0017
U = UNAFFECTED BY RESET
1. Disable interrupts by setting the I bit in the condition code register.
2. Write to the OCRH. Compares are now inhibited until OCRL is written.
reset:
reset:
($FFFC)
$0012
W
W
R
R
TIMER CONTROL REG.
Figure 9-8. Timer Output Compare Block Diagram
OCRH7
OCRL7
Figure 9-9. Output Compare Registers (OCRH, OCRL)
BIT 7
U
U
Freescale Semiconductor, Inc.
OCRH ($0016)
For More Information On This Product,
OCRH6
OCRL6
BIT 6
16-BIT COMPARATOR
16-BIT PROGRAMMABLE TIMER
16-BIT COUNTER
U
U
Go to: www.freescale.com
OCRH5
OCRL5
BIT 5
OUTPUT COMPARE
(OCF)
April 30, 1998
U
U
OCRL ($0017)
TIMER STATUS REG.
OCRH4
OCRL4
BIT 4
U
U
OCRH3
OCRL3
GENERAL RELEASE SPECIFICATION
BIT 3
$0013
U
U
OCRH2
OCRL2
BIT 2
U
U
4
DETECT
SELECT
LOGIC
EDGE
OCRH1
OCRL1
BIT 1
U
U
INTERRUPT
OCRL
INTERNAL
REQUEST
INTERNAL
(XTAL 2)
R/W
CLOCK
TIMER
DATA
OCRH0
OCRL0
BUS
TCMP
BIT 0
U
U
9-7