mpc8360e Freescale Semiconductor, Inc, mpc8360e Datasheet - Page 63

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mpc8360e

Manufacturer Part Number
mpc8360e
Description
Mpc8360e Powerquicc Ii Pro Family
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Figure 45
Figure 46
generally reference the rising edge of the clock, these AC timing diagrams also apply when the falling edge
is the active edge.
Figure 46
Figure 47
19 HDLC, BISYNC, Transparent, and Synchronous UART
This section describes the DC and AC electrical specifications for the high level data link control (HDLC),
BiSync, transparent, and synchronous UART protocols of the MPC8360E/58E.
Freescale Semiconductor
MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2
UtopiaCLK (output)
UtopiaCLK (input)
provides the AC test load for the UTOPIA.
and
shows the UTOPIA timing with external clock.
shows the UTOPIA timing with internal clock.
Output Signals:
Output Signals:
Input Signals:
Input Signals:
Figure 47
UTOPIA
UTOPIA
UTOPIA
UTOPIA
Output
represent the AC timing from
Figure 46. UTOPIA AC Timing (External Clock) Diagram
Figure 47. UTOPIA AC Timing (Internal Clock) Diagram
t
UEIVKH
t
UIIVKH
Figure 45. UTOPIA AC Test Load
Z
0
= 50 Ω
t
UEKHOX
t
UIKHOX
t
UIIXKH
t
UEKHOV
t
t
UEIXKH
UIKHOV
Table
56. Note that although the specifications
HDLC, BISYNC, Transparent, and Synchronous UART
R
L
= 50 Ω
OV
DD
/2
63

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