isp1160 NXP Semiconductors, isp1160 Datasheet - Page 34
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isp1160
Manufacturer Part Number
isp1160
Description
Isp1160 Embedded Universal Serial Bus Host Controller
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1160.pdf
(88 pages)
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Product data
Fig 27. Using an external OC detection circuit.
’n’ represents the downstream port number (n = 1 or 2).
V BUS
downstream
connector
9.8.2 Using an external OC detection circuit
9.9.1 HC suspended state
USB
port
9.9 Suspend and wake-up
OC detect
V o
external
When V
internal OC detection circuit cannot be used. An external OC detection circuit must be
used instead. Regardless of the V
always be used. To use an external OC detection circuit, AnalogOCEnable, bit 10 of
the HcHardwareConfiguration register, should be logic 0. By default after reset, this
bit is already logic 0; therefore, the HCD does not need to clear this bit.
Figure 27
The HC can be put into suspended state by setting the HcControl register (01H to
read, 81H to write). See
OC
EN
V i
47 pF
CC
(2 )
5 V
shows how to use an external OC detection circuit.
(pin 56) is connected to a 3.3 V instead of the 5 V power supply, the
22
22
H_PSWn_N
3.3 V or 5 V
H_OCn_N
V CC
Rev. 05 — 24 December 2004
H_DMn
H_DPn
Figure 14
OC detect
regulator
CC
for the HC’s flow of USB state changes.
15 k
(2 )
value, an external OC detection circuit can
bit 12
Configuration
HcHardware
ATX
OC select
1
0 Reg
PSW
C/L
Embedded USB Host Controller
HC CORE
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
ISP1160
SIE
Configuration
HcHardware
bit 10
004aaa067
ISP1160
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