isp1506a NXP Semiconductors, isp1506a Datasheet - Page 14

• Manufacturer Part Number: isp1506a
• Description: Isp1506a; Isp1506b Ulpi Hi-speed Universal Serial Bus On-the-go Transceiver
• Manufacturer: NXP Semiconductors

NXP Semiconductors
ISP1506A_ISP1506B_1
Product data sheet
7.9.15 NXT
7.9.16 CLOCK
7.9.17 GND (die pad)
ULPI next data output pin. The ISP1506 holds NXT at LOW by default. When DIR is LOW
and the link is sending data to the ISP1506, NXT will be asserted to notify the link to
provide the next data byte. When DIR is at HIGH and the ISP1506 is sending data to the
link, NXT will be asserted to notify the link that another valid byte is on the bus. NXT is not
used for register read data or the RXCMD status update.
For details on NXT usage, refer to
Rev.
A 60 MHz output interface clock to synchronize the ULPI bus. The ISP1506 provides two
clocking options:
For details on CLOCK usage, refer to
Specification Rev.
Global ground signal, except for the charge pump that uses CPGND. The die pad is
exposed on the underside of the package as a ground plate. This acts as a ground to all
circuits in the ISP1506, except the charge pump. To ensure correct operation of the
ISP1506, GND must be soldered to the cleanest ground available.
•
•
A crystal attached between the XTAL1 and XTAL2 pins.
A clock driven into the XTAL1 pin, with the XTAL2 pin left floating.
1.1”.
1.1”.
Rev. 01 — 30 May 2007
Ref. 3 “UTMI+ Low Pin Interface (ULPI) Specification
Ref. 3 “UTMI+ Low Pin Interface (ULPI)
ISP1506A; ISP1506B
ULPI HS USB OTG transceiver
© NXP B.V. 2007. All rights reserved.
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