fdc37m707 Standard Microsystems Corp., fdc37m707 Datasheet - Page 109
fdc37m707
Manufacturer Part Number
fdc37m707
Description
Fdc37m707 Enhanced Super I/o Controller With Wake-up Features
Manufacturer
Standard Microsystems Corp.
Datasheet
1.FDC37M707.pdf
(194 pages)
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UART Power Management
Direct power management is controlled by
CR22. Refer to CR22 for more information. Auto
Power Management is enabled by CR23-B4 and
B5.
auto power management operations:
1.
2.
Note:
Exit Auto Powerdown
The transmitter exits powerdown on a write to
the XMIT buffer.
powerdown when RXDx changes state.
Parallel Port
Direct power management is controlled by
CR22. Refer to CR22 for more information.
The transmitter enters auto powerdown
when the transmit buffer and shift register
are empty.
The receiver enters powerdown when the
following conditions are all met:
A. Receive FIFO is empty
B. The receiver is waiting for a start bit.
When set, these bits allow the following
While in powerdown the Ring Indicator
interrupt is still valid and transitions
when the RI input changes.
The receiver exits auto
109
Auto Power Management is enabled by CR23-
B3. When set, this bit allows the ECP or EPP
logical parallel port blocks to be placed into
powerdown when not being used.
The EPP logic is in powerdown under any of the
following conditions:
1.
2.
ECP mode.
The ECP logic is in powerdown under any of the
following conditions:
1.
2
Exit Auto Powerdown
The parallel port logic can change powerdown
modes when the ECP mode is changed through
the ecr register or when the parallel port mode is
changed through the configuration registers.
EPP is not enabled in the configuration
registers.
EPP is not selected through ecr while in
ECP is not enabled in the configuration
registers.
SPP, PS/2 Parallel port or EPP mode is
selected through ecr while in ECP mode.
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