fdc37m707 Standard Microsystems Corp., fdc37m707 Datasheet - Page 143

• Manufacturer Part Number: fdc37m707
• Description: Fdc37m707 Enhanced Super I/o Controller With Wake-up Features
• Manufacturer: Standard Microsystems Corp.

Note A. Logical Device IRQ and DMA Operation
1.
a.
b.
c.
d.
IRQ and DMA Enable and Disable: Any time the IRQ or DACK for a logical block is
disabled by a register bit in that logical block, the IRQ and/or DACK must be disabled. This
is in addition to the IRQ and DACK disabled by the Configuration Registers (active bit or
address not valid).
FDC: For the following cases, the IRQ and DACK used by the FDC are disabled (high
impedance). Will not respond to the DREQ
Digital Output Register (Base+2) bit D3 (DMAEN) set to "0".
The FDC is in power down (disabled).
Serial Port 1 and 2:
Modem Control Register (MCR) Bit D2 (OUT2) - When OUT2 is a logic "0", the serial port
interrupt is forced to a high impedance state - disabled.
Parallel Port:
I.
ii.
Keyboard Controller: Refer to the KBD section of this spec.
(FROM ECR REGISTER)
SPP and EPP modes: Control Port (Base+2) bit D4 (IRQE) set to "0", IRQ is
disabled (high impedance).
ECP Mode:
(1)
(2)
000
001
010
011
100
101
110
111
MODE
(DMA) dmaEn from ecr register. See table.
IRQ - See table.
PRINTER
CONFIG
TEST
FIFO
ECP
RES
SPP
EPP
143
CONTROLLED BY
IRQ PIN
IRQE
IRQE
IRQE
IRQE
IRQE
(on)
(on)
(on)
CONTROLLED BY
PDREQ PIN
dmaEn
dmaEn
dmaEn
dmaEn
dmaEn
dmaEn
dmaEn
dmaEn