w83l517g Winbond Electronics Corp America, w83l517g Datasheet - Page 113

• Manufacturer Part Number: w83l517g
• Description: Winbond Lpc I/o For Notebook W83l517d/ W83l517d-f
• Manufacturer: Winbond Electronics Corp America

CR25 (Default 0x00)
CR26 (Default 0s00,000b)
Bit 7 ~ 4: Reserved
Bit 3: FIRTRI
Bit 2: URATRI
Bit 1: PRTTRI
Bit 0: FDCTRI.
Bit 7: Reserved
Bit 6: HEFRAS
Bit 5: LOCKREG
Bit 4: Reserved.
Bit 3: DSFDLGRQ
Bit 2: DSPRLGRQ
Bit 1: DSUALGRQ
= 0 Enable UART A legacy mode IRQ selecting, then MCR bit 3 is effective on selecting IRQ
= 1 Disable UART A legacy mode IRQ selecting, then MCR bit 3 is not effective on selecting IRQ
When write to “1”, UART interface is set to tri-state and reduce the power consumption of
chip.
= 0 Enable FDC legacy mode on IRQ and DRQ selection, then DO register bit 3 is effective
= 1 Disable FDC legacy mode on IRQ and DRQ selection, then DO register bit 3 is not
When write to “1” ,FIR interface is set to tri-state and reduce the power consumption of chip.
When write to “1”, PRT interface is set to tri-state and reduce the power consumption of chip.
When write to “1”,FDC interface is set to tri-state and reduce the power consumption of chip.
These two bits define how to enable Configuration mode. The corresponding power-on
setting pin is RTSA# (pin 42).
HEFRAS Address and Value
= 0 Write 87h to the location 2E twice.
= 1 Write 87h to the location 4Etwice.
= 0 Enable R/W Configuration Registers.
= 1 Disable R/W Configuration Registers.
= 0 Enable PRT legacy mode on IRQ and DRQ selection, then DCR bit 4 is effective on
= 1 Disable PRT legacy mode on IRQ and DRQ selection, then DCR bit 4 is not effective
effective on selecting IRQ
selecting IRQ
on selecting IRQ
on selecting IRQ
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W83L517D/W83L517D-F
Publication Release Date: May 23, 2005
Revision 1.0