w83l517g Winbond Electronics Corp America, w83l517g Datasheet - Page 93

• Manufacturer Part Number: w83l517g
• Description: Winbond Lpc I/o For Notebook W83l517d/ W83l517d-f
• Manufacturer: Winbond Electronics Corp America

Bit 7, 6: These two bits are a logic one during a read. They can be written.
Bit 5: Direction control bit
parallel port is in output mode (write). This bit can be read and written. In SPP mode, this bit is invalid
and fixed at zero.
Bit 4: A 1 in this position allows an interrupt to occur when
Bit 3: A 1 in this bit position selects the printer.
Bit 2: A 0 starts the printer (50 microsecond pulse, minimum).
Bit 1: A 1 causes the printer to line-feed after a line is printed.
Bit 0: A 0.5 microsecond minimum high active pulse clocks data into the printer. Valid data must be
present for a minimum of 0.5 microseconds before and after the strobe pulse.
9.2.4
The address port is available only in EPP mode. Bit definitions are as follows:
The contents of DB0-DB7 are buffered (non-inverting) and output to ports PD0-PD7 during a write
operation. The leading edge of IOW#
trailing edge of IOW# latches the data for the duration of the EPP write cycle.
PD0-PD7 ports are read during a read operation. The leading edge of IOR# causes an EPP address
read cycle to be performed and the data to be output to the host CPU.
EPP Address Port
When this bit is a logic 1, the parallel port is in input mode (read); when it is a logic 0, the
1
7
7
6
1
6
5
c
auses an EPP address write cycle to be performed, and the
5
4
3
4
2
- 93 -
3
1
2
0
W83L517D/W83L517D-F
ACK#
1
STROBE
AUTO FD
INIT
SLCT IN
IRQ ENABLE
DIR
0
Publication Release Date: May 23, 2005
changes from low to high.
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
Revision 1.0