w83l517g Winbond Electronics Corp America, w83l517g Datasheet - Page 99

• Manufacturer Part Number: w83l517g
• Description: Winbond Lpc I/o For Notebook W83l517d/ W83l517d-f
• Manufacturer: Winbond Electronics Corp America

9.3.6
When the direction bit is 0, bytes written or DMAed from the system to this FIFO are transmitted by a
hardware handshake to the peripheral using the ECP parallel port protocol. Transfers to the FIFO are
byte aligned.
When the direction bit is 1, data bytes from the peripheral are read under automatic hardware
handshake from ECP into this FIFO. Reads or DMAs from the FIFO will return bytes of ECP data to
the system.
9.3.7
Data bytes may be read, written, or DMAed to or from the system to this FIFO in any direction. Data in
the tFIFO will not be transmitted to the parallel port lines. However, data in the tFIFO may be
displayed on the parallel port data lines.
9.3.8
This register is a read-only register. When it is read, 10H is returned. This indicates to the system that
this is an 8-bit implementation.
9.3.9
The bit definitions are as follows:
Bit 7: This bit is read-only. It is at low level during a read. This means that this chip does not support
hardware RLE compression.
Bit 6: Returns the value on the ISA IRQ line to determine possible conflicts.
ecpDFifo (ECP Data FIFO) Mode = 011
tFifo (Test FIFO Mode) Mode = 110
cnfgA (Configuration Register A) Mode = 111
cnfgB (Configuration Register B) Mode = 111
7
6
5
4
3
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1
2
1
1
W83L517D/W83L517D-F
0
1
compress
IRQx 0
IRQx 1
IRQx 2
intrValue
Publication Release Date: May 23, 2005
Revision 1.0