fin1048mtc-nl Fairchild Semiconductor, fin1048mtc-nl Datasheet
fin1048mtc-nl
Manufacturer Part Number
fin1048mtc-nl
Description
Fin1048 3.3v Lvds 4-bit Flow-through High Speed Differential Receiver
Manufacturer
Fairchild Semiconductor
Datasheet
1.FIN1048MTC-NL.pdf
(6 pages)
© 2003 Fairchild Semiconductor Corporation
FIN1048M
FIN1048MTC
FIN1048
3.3V LVDS 4-Bit Flow-Through
High Speed Differential Receiver
General Description
This quad receiver is designed for high speed interconnect
utilizing Low Voltage Differential Signaling (LVDS) technol-
ogy. The receiver translates LVDS levels, with a typical dif-
ferential input threshold of 100mV, to LVTTL signal levels.
LVDS provides low EMI at ultra low power dissipation even
at high frequencies. This device is ideal for high speed
transfer of clock and data.
The FIN1048 can be paired with its companion driver, the
FIN1047, or any other LVDS driver.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Order Number
Package Number
MTC16
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
DS500588
Features
Pin Descriptions
Function Table
H
Z
R
Greater than 400Mbs data rate
Flow-through pinout simplifies PCB layout
3.3V power supply operation
0.4ns maximum differential pulse skew
2.5ns maximum propagation delay
Low power dissipation
Power-Off protection
Fail safe protection for open-circuit, shorted and termi-
nated conditions
Meets or exceeds the TIA/EIA-644 LVDS standard
Pin compatible with equivalent RS-422 and LVPECL
devices
16-Lead SOIC and TSSOP packages save space
OUT1
High Impedance
HIGH Logic Level
R
R
L or Open
IN1
IN1
Package Description
EN
, R
H
H
H
X
, R
, R
OUT2
Pin Name
IN2
IN2
GND
V
EN
EN
, R
, R
, R
CC
L or Open
L or Open
L or Open Fail Safe Condition
OUT3
IN3
IN3
EN
H
X
Fail Safe
L
Inputs
, R
, R
, R
LOW Logic Level
IN4
IN4
OUT4
R
Open, Shorted, Terminated
H
L
X
X
IN
September 2001
Revised August 2003
LVTTL Data Outputs
Non-Inverting LVDS Inputs
Inverting LVDS Inputs
Driver Enable Pin
Inverting Driver Enable Pin
Power Supply
Ground
R
www.fairchildsemi.com
Description
OUT
H
L
X
X
X
Don’t Care
Outputs
R
OUT
H
H
L
Z
Z
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