ata6616 ATMEL Corporation, ata6616 Datasheet - Page 126
ata6616
Manufacturer Part Number
ata6616
Description
Microcontroller With Lin Transceiver, 5v Regulator And Watchdog
Manufacturer
ATMEL Corporation
Datasheet
1.ATA6616.pdf
(310 pages)
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4.11.11.2
4.11.11.3
126
ATA6616/ATA6617 [Preliminary]
Timer/Counter0 Control Register B – TCCR0B
Timer/Counter0 Register – TCNT0
• Bit 7 – FOC0A: Force Output Compare A
The FOC0A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0A bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC0A output is
changed according to its COM0A1:0 bits setting. Note that the FOC0A bit is implemented as a
strobe. Therefore it is the value present in the COM0A1:0 bits that determines the effect of the
forced compare.
A FOC0A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR0A as TOP.
The FOC0A bit is always read as zero.
• Bit 6:3 – Res: Reserved Bits
These bits are reserved in the ATtiny167 and will always read as zero.
• Bit 2:0 – CS02:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter, see
4-33.
Table 4-33.
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes) the Compare
Match on the following timer clock. Modifying the counter (TCNT0) while the counter is running,
introduces a risk of missing a Compare Match between TCNT0 and the OCR0x Register.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
CS02
0
0
0
0
1
1
1
1
TCNT07
Clock Select Bit Description
FOC0A
R/W
W
7
0
7
0
CS01
0
0
1
1
0
0
1
1
TCNT06
R/W
R
6
–
0
6
0
TCNT05
CS00
R/W
0
1
0
1
0
1
0
1
5
0
R
5
–
0
TCNT04
Description
No clock source (Timer/Counter stopped).
clk
clk
clk
clk
clk
clk
clk
R/W
4
0
R
4
–
0
T0S
T0S
T0S
T0S
T0S
T
T
0
0
S
S
/256 (From prescaler)
/1024 (From prescaler)
DRAFT
/8 (From prescaler)
/32 (From prescaler)
/64 (From prescaler)
/128 (From prescaler)
(No prescaling)
TCNT03
R/W
3
0
R
3
–
0
TCNT02
R/W
CS02
R/W
2
0
2
0
TCNT01
R/W
CS01
R/W
1
0
1
0
TCNT00
R/W
CS00
R/W
0
0
9132A–AUTO–10/08
0
0
TCCR0B
TCNT0
Table
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