ata6616 ATMEL Corporation, ata6616 Datasheet - Page 160

• Manufacturer Part Number: ata6616
• Description: Microcontroller With Lin Transceiver, 5v Regulator And Watchdog
• Manufacturer: ATMEL Corporation

4.13.11.3
160
ATA6616/ATA6617 [Preliminary]
Timer/Counter1 Control Register C – TCCR1C
• Bit 5 – Reserved Bit
This bit is reserved for future use. For ensuring compatibility with future devices, this bit must be
written to zero when TCCR1B is written.
• Bit 4:3 – WGM13:2: Waveform Generation Mode
See TCCR1A Register description.
• Bit 2:0 – CS12:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter, see
4-54
Table 4-38.
If external pin modes are used for the Timer/Counter1, transitions on the T1 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
• Bit 7 – FOC1A: Force Output Compare for Channel A
• Bit 6 – FOC1B: Force Output Compare for Channel B
The FOC1A/FOC1B bits are only active when the WGM13:0 bits specifies a non-PWM mode.
However, for ensuring compatibility with future devices, these bits must be set to zero when
TCCR1A is written when operating in a PWM mode. When writing a logical one to the
FOC1A/FOC1B bit, an immediate compare match is forced on the Waveform Generation unit.
The OC1nx output is changed according to its COM1A/B1:0 and OC1nx bits setting. Note that
the FOC1A/FOC1B bits are implemented as strobes. Therefore it is the value present in the
COM1A/B1:0 bits that determine the effect of the forced compare.
A FOC1A/FOC1B strobe will not generate any interrupt nor will it clear the timer in Clear Timer
on Compare match (CTC) mode using OCR1A as TOP.
The FOC1A/FOC1B bits are always read as zero.
Bit
Read/Write
Initial Value
CS12
0
0
0
0
1
1
1
1
and
Figure
CS11
Clock Select Bit Description
0
0
1
1
0
0
1
1
FOC1A
R/W
4-55.
7
0
CS10
FOC1B
0
1
0
1
0
1
0
1
R/W
6
0
Description
No clock source (Timer/Counter stopped).
clk
clk
clk
clk
clk
External clock source on T1 pin. Clock on falling edge.
External clock source on T1 pin. Clock on rising edge.
I/O
I/O
I/O
I/O
I/O
R/W
5
–
0
/1 (No prescaling)
/8 (From prescaler)
/64 (From prescaler)
/256 (From prescaler)
/1024 (From prescaler)
R
4
–
0
DRAFT
R
3
–
0
R
2
–
0
R
1
–
0
R
0
–
0
9132A–AUTO–10/08
TCCR1C
Figure