ata6616 ATMEL Corporation, ata6616 Datasheet - Page 91
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ata6616
Manufacturer Part Number
ata6616
Description
Microcontroller With Lin Transceiver, 5v Regulator And Watchdog
Manufacturer
ATMEL Corporation
Datasheet
1.ATA6616.pdf
(310 pages)
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4.10.2
4.10.2.1
9132A–AUTO–10/08
DRAFT
Ports as General Digital I/O
Configuring the Pin
The ports are bi-directional I/O ports with optional internal pull-ups.
tional description of one I/O-port pin, here generically called Pxn.
Figure 4-25. General Digital I/O
Note:
Each port pin consists of three register bits: DDxn, PORTxn, and PINxn. As shown in
Description for I/O Ports” on page
PORTxn bits at the PORTx I/O address, and the PINxn bits at the PINx I/O address.
The DDxn bit in the DDRx Register selects the direction of this pin. If DDxn is written logic one,
Pxn is configured as an output pin. If DDxn is written logic zero, Pxn is configured as an input
pin.
Pxn
1. WRx, WPx, WDx, RRx, RPx, and RDx are common to all pins within the same port. clk
SLEEP, and PUD are common to all ports.
SLEEP: SLEEP CONTROL
clk
PUD: PULLUP DISABLE
I/O
: I/O CLOCK
(1)
ATA6616/ATA6617 [Preliminary]
109, the DDxn bits are accessed at the DDRx I/O address, the
SLEEP
SYNCHRONIZER
WDx: WRITE DDRx
RDx: READ DDRx
WRx: WRITE PORTx
RRx: READ PORTx REGISTER
RPx: READ PORTx PIN
WPx: WRITE PINx REGISTER
D
L
Q
Q
D
PINxn
Q
Q
Figure 4-25
RESET
RESET
PORTxn
Q
Q
Q
Q
DDxn
CLR
CLR
D
D
RRx
shows a func-
PUD
WDx
RDx
RPx
clk
1
0
I/O
WPx
WRx
“Register
I/O
,
91
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