ata6616 ATMEL Corporation, ata6616 Datasheet - Page 195

• Manufacturer Part Number: ata6616
• Description: Microcontroller With Lin Transceiver, 5v Regulator And Watchdog
• Manufacturer: ATMEL Corporation

4.16.5.4
4.16.5.5
Figure 4-74. Busy Signal in LIN Mode
9132A–AUTO–10/08
DRAFT
1) LBUSY
2) LBUSY
3) LBUSY
LIN bus
Configuration
Busy Signal
LCMD=Tx Header
BREAK
Node providing the master task
Depending on the mode (LIN or UART), LCONF[1..0] bits of the LINCR register set the controller
in the following configuration
Table 4-49.
The LIN configuration is independent of the programmed LIN protocol.
The listening mode connects the internal Tx LIN and the internal Rx LIN together. In this mode,
the TXLIN output pin is disabled and the RXLIN input pin is always enabled. The same scheme
is available in UART mode.
Figure 4-73. Listening Mode
LBUSY bit flag in LINSIR register is the image of the BUSY signal. It is set and cleared by hard-
ware. It signals that the controller is busy with LIN or UART communication.
Busy Signal in LIN Mode
Field
UART
Mode
LIN
HEADER
SYNC
Configuration Table versus Mode
Node providing neither the master task, neither a slave task
LCONF[1..0]
Field
00
01
10
11
00
01
10
11
b
b
b
b
b
b
b
b
PROTECTED
IDENTIFIER
LISTEN
Rx LIN
Tx LIN
internal
internal
LIDOK
(Table
Field
Configuration
LIN standard configuration (default)
No CRC field detection or transmission
Frame_Time_Out disable
Listening mode
8-bit data, no parity & 1 stop-bit
8-bit data, even parity & 1 stop-bit
8-bit data, odd parity & 1 stop-bit
Listening mode, 8-bit data, no parity & 1 stop-bit
FRAME SLOT
ATA6616/ATA6617 [Preliminary]
4-49):
1
0
LCMD=Tx or Rx Response
DATA-0
Field
Node providing a slave task
RESPONSE
DATA-n
RXLIN
TXLIN
Field
LTXOK or LRXOK
CHECKSUM
Field
195