tda5251f1 Infineon Technologies Corporation, tda5251f1 Datasheet - Page 25

• Manufacturer Part Number: tda5251f1
• Description: Ask/fsk 315mhz Wireless Transceiver
• Manufacturer: Infineon Technologies Corporation

Table 2-7
Confidential
Bus Data Format in I
Table 2-8
Table 2-9
Table 2-10
Table 2-10
* mandatory HIGH
3-wire Bus Mode
In this mode pin 2 (BusMode)= HIGH and Pin 16 (BusData) is in the data input/output pin. Pin 24
(EN) is used to activate the bus interface to allow the transfer of data to / from the device. When pin
24 (EN) is inactive (HIGH), data transfer is inhibited.
Data Transition:
Data transition on pin 16 (BusData) can only occur if the clock BusCLK is LOW. To perform a data
transfer the interface has to be enabled. This is done by setting the EN line to LOW. A serial transfer
is done via BusData, BusCLK and EN. The bit stream needs no chip address.
Data Transfer Write Mode:
To start the communication the EN line has to be set to LOW. The desired sub address byte and
data bytes have to follow. The subaddress (00H...0FH) determines which of the data bytes are
transmitted. At the end of data transition the EN must be HIGH.
Data transfer Read Mode:
To start the communication in the read mode, the EN line has to be set to LOW followed by the sub
address to read (80H, 81H). Afterwards the device is ready to read out data. At the end of data
transition EN must be HIGH.
Preliminary Specification
STA
STA
STA
MSB
MSB CHIP ADDRESS (WRITE) LSB
MSB CHIP ADDRESS (WRITE) LSB
R7
MSB
1
1
MSB
1
1
1
1
1
1
1
1
CHIP ADDRESS
1
1
1
0
R6
(WRITE)
Chip address Organization
0
I
0
I
I
I
2
2
2
2
C Bus Write Mode 8 Bit
C Bus Write Mode 16 Bit
C Bus Read Mode
0
C Bus Read Mode (continued)
0
0
1
1
0
0
0
0
0
R5
0
2
0
0
0
C Mode
LSB
0
0
ACK S7
DATA OUT FROM SUB ADDRESS
ACK S7
ACK
0
0
MSB
R4
MSB
MSB
S6
S7
SUB ADDRESS (READ)
0
0
S6
S5
S6
00H...08H, 0DH, 0EH, 0FH
SUB ADDRESS (WRITE)
00H...08H, 0DH, 0EH, 0FH
SUB ADDRESS (WRITE)
S5
80H, 81H
S4
S5
R3
0
0
S4
S3
S4
25
S3
S2
S3
LSB
0
1
S2
S1
R2
S2
LSB
S0 ACK STA
S1
S1
LSB
LSB
S0 ACK D15 ... D8 ACK D7 D6 ...
S0 ACK D7
R1
MSB
MSB
MSB
1
Chip Address Read
Chip Address Write
Functional Description
D6 D5 D4 D3 D2 D1 D0 ACK STO
1
CHIP ADDRESS (READ)
R0
LSB
Function
1
DATA IN
0
DATA IN
0
TDA5251 F1
ACK*
Version 1.0
0
0
LSB
2003-02-18
D0
LSB
LSB
1
ACK STO
STO
ACK