tda5251f1 Infineon Technologies Corporation, tda5251f1 Datasheet - Page 32
tda5251f1
Manufacturer Part Number
tda5251f1
Description
Ask/fsk 315mhz Wireless Transceiver
Manufacturer
Infineon Technologies Corporation
Datasheet
1.TDA5251F1.pdf
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Figure 2-13
D_OUT and RX_DATA_INV from the CONFIG register determine the output of data at Pin 28.
RxTxint and TX_ON are internally generated signals.
In RX and power down mode Data pin (Pin 28) is tied to GND.
Figure 2-14
2.4.18
The sequence timer has to control all the enable signals of the analog components inside the chip.
The time base is the 32 kHz RC oscillator.
After the first POWER ON or RESET a 730kHz clock is available at the clock output pin. This clock
output can be used by an external mP to set the system into the desired state and outputs valid data
after 500 µs (see Figure 2-15 and Figure 2-16, t CLKSU )
There are two possibilities to start the device after a reset or first power on:
-
-
Note: It is required to activate the device for the duration of t
Only if this is done the normal operation timing is performed.
Preliminary Specification
PWDDD pin is LOW: Normal operation timing is performed after t
PWDDD pin is HIGH (device in power down mode): A clock is offered at the clock output pin
until the device is activated (PWDDD pin is pulled to LOW). After the first activation the time
t
This could be used to extend the clock generation without device programming or activation.
SYSSU
is required until normal operation timing is performed (see Figure 2-16 ).
Sequence Timer
Data Valid Circuit
Data Input/Output Circuit
RX_DATA_INV
DATA VALID
RX DATA
TX DATA
RxTxint
D_OUT
TX ON
0,5*TH1
TH1
T
GATE
T
RSSI
GATE
0,5*TH2
TH2
TH3
32
SYSSU
DATA VALID
after first power on or a reset.
SYSSU
Data
28
Functional Description
(see Figure 2-15).
TDA5251 F1
Version 1.0
2003-02-18
data_switch.wmf
data_valid.wmf
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