px1011b NXP Semiconductors, px1011b Datasheet - Page 17
px1011b
Manufacturer Part Number
px1011b
Description
Pci Express Stand-alone X1 Phy Semiconductors
Manufacturer
NXP Semiconductors
Datasheet
1.PX1011B.pdf
(30 pages)
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NXP Semiconductors
PX1011B_2
Product data sheet
8.11 Polarity inversion
For an elastic buffer overflow, the overflow is signaled during the clock cycle where the
dropped symbol would have appeared in the data stream. In the timing diagram of
Figure
buffer overflows causing the symbol Rx-d to be discarded. The PHY drives RXSTATUS to
indicate buffer overflow during the clock cycle when Rx-d would have appeared on the
parallel interface.
To support lane polarity inversion, the PHY inverts received data when RXPOL is
asserted. The PHY begins data inversion within 20 symbols after RXPOL is asserted.
Fig 13. Elastic buffer underflow
Fig 14. Elastic buffer overflow
Fig 15. Polarity inversion
RXSTATUS2,
RXSTATUS1,
RXSTATUS0
RXDATA[7:0]
RXDATA[7:0]
RXSTATUS2,
RXSTATUS1,
RXSTATUS0
RXDATA[7:0]
14, the PHY is receiving a repeating set of symbols Rx-a through Rx-z. The elastic
RXVALID
RXVALID
RXVALID
RXCLK
RXCLK
RXCLK
RXPOL
Rx-a
000b
D21.5
Rx-a
000b
Rev. 02 — 19 March 2008
Rx-b
D21.5
Rx-b
Rx-c
Rx-c
PCI Express stand-alone X1 PHY
110b
Rx-e
101b
D10.2
EDB
Rx-f
000b
D10.2
Rx-d
000b
PX1011B
© NXP B.V. 2008. All rights reserved.
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