w83877atd Winbond Electronics Corp America, w83877atd Datasheet - Page 103

• Manufacturer Part Number: w83877atd
• Description: Winbond I/o
• Manufacturer: Winbond Electronics Corp America

7.0 SERIAL IRQ
W83877ATF supports a serial IRQ scheme. This allows a signal line to be used to report the legacy
ISA interrupt requests. Because more than one device may need to share the signal serial IRQ signal
line, an open drain signal scheme is used. The clock source is the PCI clock. The serial interrupt is
transfered on the IRQSER signal, one cycle consisting of three frames types: a start frame, several
IRQ/Data frame, and one Stop frame. The serial interrupt scheme adheres to the Serial IRQ
Specification for PCI System, Version 6.0.
Timing Diagrams For IRQSER Cycle
Start Frame timing with source sampled a low pulse on IRQ1
Stop Frame Timing with Host using 17 IRQSER sampling period
PCICLK
IRQSER
Drive Source
1. Start Frame pulse can be 4-8 clocks wide.
PCICLK
IRQSER
Drive
1. Stop pulse is 2 clocks wide for Quiet mode, 3 clocks wide for Continuous mode.
2. There may be none, one or more Idle states during the Stop Frame.
3. The next IRQSER cycle's Start Frame pulse may or may not start immediately after the turn-around clock of the Stip Frame.
H=Host Control
H=Host Control
S
FRAME
IRQ14
None
IRQ1
SL
or
H
R
SL=Slave Control
T
START
H
Host Controller
R=Recovery
START FRAME
S
1
IRQ15
FRAME
IRQ15
R
T
R
R=Recovery
S
IOCHCK
T
FRAME
None
R
T=Turn-around
None
S
IRQ0 FRAME
- 99 -
T
R
T=Turn-around
I
2
T
STOP
STOP FRAME
H
Host Controller
1
S
IRQ1
IRQ1 FRAME
Publication Release Date: April 1998
S=Sample
R
R
T
T
S=Sample
S
None
IRQ2 FRAME
W83877ATF
NEXT CYCLE
I=Idle
R
START
3
T
Version 0.51