w83877atd Winbond Electronics Corp America, w83877atd Datasheet - Page 159

• Manufacturer Part Number: w83877atd
• Description: Winbond I/o
• Manufacturer: Winbond Electronics Corp America

0
1-4
5
6-7
8.4.4 Power Management 1 Enable Register 2 (PM1EN2)
Register Location:
Default Value:
Attribute:
Size:
0-7
8.4.5 Power Management 1 Control Register 1 (PM1CTL1)
Register Location:
Default Value:
Attribute:
Size:
Bit
Bit
TMR_EN
Reserved
GBL_EN
Reserved
Reserved
Name
Name
7
6
Reserved. These bits always return a value of zero.
This is the timer carry interrupt enable bit. When this bit is set, an SCI event is
generated anytime the TMR_STS bit is set. When this bit is reset no interrupt
is generated when the TMR_STS bit is set.
Reserved. These bits always return a value of zero.
The global enable bit. When both the GBL_EN bit and the GBL_STS bit are
set, an SCI interrupt is raised.
Reserved.
<CR33>+3H System I/O Space
00h
Read/write
8 bits
<CR33>+4H System I/O Space
00h
Read/write
8 bits
5
4
3
2
1
- 155 -
0
Description
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Description
Publication Release Date: April 1998
W83877ATF
Version 0.51