w83877atd Winbond Electronics Corp America, w83877atd Datasheet - Page 164

• Manufacturer Part Number: w83877atd
• Description: Winbond I/o
• Manufacturer: Winbond Electronics Corp America

8.4.12 Power Management 1 Timer 4 (PM1TMR4)
Register Location:
Default Value:
Attribute:
Size:
0-7
8.4.13 General Purpose Event 0 Status Register 1 (GP0STS1)
Register Location:
Default Value:
Attribute:
Size:
These bits indicate the status of the SCI input, which is set when the device's IRQ is raised. If the
corresponding enable bit in the SCI interrupt enable register (in GP0EN1) is set, an SCI interrupt is
raised and routed to the output pin. Wrinting a 1 clears the bit, and writing a 0 has no effect. If the bit
is not cleared, new IRQ for the SCI logic input is ignored, therefore no SCI interrupt is raised.
0
1
2
3
4-7
Bit
Bit
Reserved
URBSCISTS
URASCISTS
FDCSCISTS
PRTSCISTS
Reserved
Name
Name
Reserved. These bits always return a value of zero.
UART B SCI status, which is set by the UART B IRQ.
UART A SCI status, which is set by the UART A IRQ.
FDC SCI status, which is set by the FDC IRQ.
PRT SCI status, which is set by the printer port IRQ.
Reserved.
<CR33>+BH System I/O Space
00h
Read only
8 bits
<CR34> System I/O Space
00h
Read/write
8 bits
7
7
6
6
5
5
4
4
3
3
- 160 -
2
2
1
Description
Description
1
0
0
URBSCISTS
URASCISTS
FDCSCISTS
PRTSCISTS
Reserved
Reserved
Reserved
Reserved
Publication Release Date: April 1998
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
W83877ATF
Version 0.51