w83977atg Winbond Electronics Corp America, w83977atg Datasheet - Page 117
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w83977atg
Manufacturer Part Number
w83977atg
Description
W83877tf Plus Kbc, Gp I/o, Wake-up, Fir, Cir, Pb-free
Manufacturer
Winbond Electronics Corp America
Datasheet
1.W83977ATG.pdf
(198 pages)
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11. PLUG AND PLAY CONFIGURATION
W83977ATF/ATG uses Compatible PNP protocol to access configuration registers for setting up
different types of configurations. In W83977ATF/ATG, there are nine Logical Devices (from Logical
Device 0 to Logical Device A, with the exception of logical device 4 for compatibility) which correspond
to ten individual functions: FDC (logical device 0), PRT (logical device 1), UART1 (logical device 2),
UART2 (logical device 3), KBC (logical device 5), IR (logical device 6), GPIO1 (logical device 7),
GPIO2 (logical device 8), GPIO3 (logical device 9), and ACPI ((logical device A). Each Logical Device
has its own configuration registers (above CR30). Host can access those registers by writing an
appropriate logical device number into logical device select register at CR7.
11.1 Compatible PnP
11.1.1 Extended Function Registers
In Compatible PnP, there are two ways to enter Extended Function and read or write the configuration
registers. HEFRAS (CR26 bit 6) can be used to select one of these two methods of entering the
Extended Function mode as follows:
After Power-on reset, the value on RTSA (pin 43) is latched by HEFRAS of CR26. In Compatible
PnP, a specific value (87h) must be written twice to the Extended Functions Enable Register (I/O port
address 3F0h or 370h). Secondly, an index value (02h, 07h-FFh) must be written to the Extended
Functions Index Register (I/O port address 3F0h or 370h same as Extended Functions Enable
Register) to identify which configuration register is to be accessed. The designer can then access the
desired configuration register through the Extended Functions Data Register (I/O port address 3F1h
or 371h).
After programming of the configuration register is finished, an additional value (AAh) should be written
to EFERs to exit the Extended Function mode, to prevent unintentional access to those configuration
registers. The designer can also set bit 5 of CR26 (LOCKREG) to high to protect the configuration
registers against accidental accesses.
The configuration registers can be reset to their default or hardware settings only by a cold reset (pin
MR = 1). A warm reset will not affect the configuration registers.
HEFRAS
0
1
write 87h to the location 3F0h twice
write 87h to the location 370h twice
- 109 -
ADDRESS AND VALUE
W83977ATF/W83977ATG
Publication Release Date: May 2006
Revision 0.6
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