w83977atg Winbond Electronics Corp America, w83977atg Datasheet - Page 160

• Manufacturer Part Number: w83977atg
• Description: W83877tf Plus Kbc, Gp I/o, Wake-up, Fir, Cir, Pb-free
• Manufacturer: Winbond Electronics Corp America

*Note: 1). Internal logic provides an 1us Debounce Filter to reject the width of P20 pulse less than 1us.
14.10 Logical Device 9 (GP I/O Port III)
CR30 (Default 0x00)
CR60, CR 61 (Default 0x00, 0x00)
CR62, CR 63 (Default 0x00, 0x00)
CR64, CR 65 (Default 0x00, 0x00)
CR70 (Default 0x00)
CR72 (Default 0x00)
Bit 2
Bit 1
Bit 0
Bit 7 - 1
Bit 0
Bit 7 - 4
Bit 3 - 0
Bit 7 - 4
Bit 3 - 0
These two registers select GP3 I/O base address [0x100:0xFFF] on 1 byte boundary.
These two registers select GP32 alternate function Primary I/O base address [0x100:0xFFE] on 2-
byte boundary; they are available as you set GP32 to be an alternate function (General
Purpose Address Decode).
These two registers select GP33 alternate function Primary I/O base address [0x100:0xFFF] on 2-
byte boundary; they are available as you set GP33 to be an alternate function (General
Purpose Address Decode).
2). The P20 signal that coming from Debounce Filter is ORed with the signal generated by the Force Time-out bit and
then connect to set the Bit 0(Watch Dog Timer Status). The ORed signal is self-clearing.
: Reserved.
: These bits select IRQ resource for GP30 as you set GP30 to be an alternate function
: Reserved.
: These bits select IRQ resource for GP31 as you set GP31 to be an alternate function
: Force Watch Dog Timer Time-out, Write only*
= 1
: Enable Power LED 1Hz rate toggle pulse with 50% duty cycle , R/W
= 1
= 0
: Watch Dog Timer Status, R/W
= 1
= 0
: Reserved.
= 1
= 0
(Interrupt Steering).
Force Watch Dog Timer time-out event; this bit is self-clearing.
Enable
Disable
Watch Dog Timer time-out occurred.
Watch Dog Timer counting
Activates the logical device.
Logical device is inactive.
(Interrupt Steering).
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W83977ATF/W83977ATG