w83977atg Winbond Electronics Corp America, w83977atg Datasheet - Page 89
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w83977atg
Manufacturer Part Number
w83977atg
Description
W83877tf Plus Kbc, Gp I/o, Wake-up, Fir, Cir, Pb-free
Manufacturer
Winbond Electronics Corp America
Datasheet
1.W83977ATG.pdf
(198 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
w83977atg-AW
Manufacturer:
Nuvoton Technology Corporation of America
Quantity:
10 000
- Current page: 89 of 198
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7.9.7
7.9.8
Bit 7:
Bit 6:
Bit 5:
Bit 7:
Bit 6~4:
Bit 3:
Bit 2~0:
Default Value
Default Value
IRM_SL3
IRM_CR
REG.
REG.
Set7.Reg6 - Infrared Module (Front End) Select 3 (IRM_SL3)
Set7.Reg7 - Infrared Module Control Register (IRM_CR)
AM_FMT - Automatic Format
A write to 1 will enable automatic format IR front-end module. These bits will affect the
output of IR_SL2~0 which is referred by IR front-end module selection (Set7.Reg4~6)
IRX_MSL - IR Receiver Module Select
Select the receiver input path from the IR front end module if IR module has a separated
high speed and low speed receiver path. If the IR module has only one receiving path,
then this bit should be set to 0.
IRSL0D - Direction of IRSL0 Pin
Select function for IRRXH or IRSL0 because they share common pin and have different
input/output direction.
Reserved, write 0.
LRC_SL2~0 - Low Speed Remote IR mode select.
These bits setup the operational mode of low speed remote IR front-end module when
AM_FMT=1 and AD_MD2~0 are configured to Remote IR mode. These values will be
automatically loaded to IR_SL2~0, respectively.
Reserved, write 0.
HRC_SL2~0 - High Speed Remote IR Mode Select.
These bits setup the operational mode of high speed remote IR front-end module when
AM_FMT=1 and .AD_MD2~0 are configured to Remote IR mode. These values will be
automatically loaded to IR_SL2~0, respectively.
AM_FMT
BIT 7
BIT 7
0
0
-
IRX_MSL
IRSL0_D
LRC_SL2
IRX_MSL
BIT 6
BIT 6
0
1
0
1
0
0
LRC_SL1
IRSL0D
BIT 5
BIT 5
0
0
LRC_SL0
RXINV
- 81 -
BIT 4
BIT 4
0
0
W83977ATF/W83977ATG
IRRX (Low/High Speed)
Receiver Pin selected
IRRXH (High Speed)
TXINV
BIT 3
BIT 3
0
0
-
IRSL0 (O/P)
IRRXH (I/P)
Function
Publication Release Date: May 2006
HRC_SL2 HRC_SL1 HRC_SL0
BIT 2
BIT 2
0
0
-
BIT 1
BIT 1
0
0
-
Revision 0.6
BIT 0
BIT 0
0
0
-
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