pef22504 Infineon Technologies Corporation, pef22504 Datasheet - Page 61

• Manufacturer Part Number: pef22504
• Description: Quad E1/t1/j1 Line Interface Component For Long- And Short-haul Applications Pef 22504 E, Pef 22504 Ht, Version 2.1
• Manufacturer: Infineon Technologies Corporation

Table 2
Pin No.
120
121
122
123
120
121
122
123
120
121
122
123
126,
127,
128,
129
51,
52,
53,
54
Data Sheet
Name
XPA1
XPB1
XPC1
XPD1
XPA1
XPB1
XPC1
XPD1
XPA1
XPB1
XPC1
XPD1
XPA2
XPB2
XPC2
XPD2
XPA3
XPB3
XPC3
XPD3
I/O Signals for P-TQFP-144-8 (cont’d)
Pin Type
O
O
I
I/O
I/O
Buffer
Type
–
–
PU
PU/–
PU/–
Function
General Purpose Output High (GPOH), port 1
PC(1:4).XPC(3:0) = 1010
The pin level is set fix to high level.
General Purpose Output Low (GPOL), port 1
PC(1:4).XPC(3:0) = 1011
The pin level is set fix to high level.
Transmit Line Tristate, low active, port 1
XLT : PC(1:2).XPC(3:0) = 1110
A low level on this port sets the transmit lines XL1/2 or
XDOP/N into tristate mode. This pin function is logically ored
with register bit XPM2.XLT.
Transmit Multifunction Pins A to D, port 2
Depending on programming of bits PC(1:4).XPC(3:0) these
multifunction ports carry information to the system interface
or from the system to the QuadLIU
are configured to be inputs. With the selection of the
appropriate pin function, the corresponding input/output
configuration is achieved automatically. Depending on bit
SIC3.RESX latching/transmission of data is done with the
rising or falling edge of SCLKX. If not connected, an internal
pullup transistor ensures a high input level.
Each input function (SYPX, XMFS, XSIG,TCLK, XLT or XLT)
may only be selected once. SYPX and XMFS must not be
used in parallel.
Selectable pin functions as described for port 1.
Transmit Multifunction Pins A to D, port 3
Depending on programming of bits PC(1:4).XPC(3:0) these
multifunction ports carry information to the system interface
or from the system to the QuadLIU
are configured to be inputs. With the selection of the
appropriate pin function, the corresponding input/output
configuration is achieved automatically. Depending on bit
SIC3.RESX latching/transmission of data is done with the
rising or falling edge of SCLKX. If not connected, an internal
pullup transistor ensures a high input level.
Each input function (SYPX, XMFS, XSIG,TCLK, XLT or XLT)
may only be selected once. SYPX and XMFS must not be
used in parallel.
Selectable pin functions as described for port 1.
61
B
B
.
.
B
.
TM
TM
. After reset the ports
. After reset the ports
Rev. 1.3, 2006-01-25
Pin Descriptions
QuadLIU
PEF 22504
TM