tea1781 NXP Semiconductors, tea1781 Datasheet - Page 16

• Manufacturer Part Number: tea1781
• Description: Greenchip Pc Secondary Control Ics
• Manufacturer: NXP Semiconductors

NXP Semiconductors
TEA1781_82_1
Preliminary data sheet
7.12.1 General
7.12 Protections
The opto control compares the primary and secondary standby duty cycle and defines if
the primary duty cycle has to be changed, see
The primary duty cycle is derived from the secondary transformer voltage. If V
is above a certain positive level before the switch SB is turned on, a down pulse is
generated. An up pulse is generated when V
The current into the opto coupler is regulated until it reaches a stable value via the down
pulse and up pulse. Through the opto coupler, the primary duty cycle and frequency
eventually stabilize to provide the duty cycle required by the secondary standby converter.
All outputs have an OVP and an OCP function. The OVP and OCP functions have a delay
of t
If the output voltage or the output current on one of the main outputs (3.3 V, 5 V, 12 V1, or
12 V2) exceeds their upper limit, the system will enter Protection mode. In this mode all
main outputs are switched off by switching off all corresponding secondary switches. The
system will enter the Normal mode again after toggling the PS_ON# signal or after a
mains interruption.
A 12 V OVP / OCP is detected in the TEA1782T. When detecting a 12 V OVP or OCP, the
pin ENABLE is pulled down and as a result both the TEA1782T and the TEA1781T will
disable the main outputs. The 5 V standby output remains on.
A 3.3 V or 5 V OVP or OCP is detected in the TEA1781T and communicated to the
TEA1782 via the pin ENABLE. As a result the TEA1782T will pull down the pin ENABLE,
disabling all main outputs.
Fig 14. TEA1782T OPTO control duty cycles
V
d(prot)
WND_SEC_1
main switch
primairy
I
, which is typically 18 s.
down
OPTO
SB
S1
up
Rev. 01 — 13 February 2009
decreasing prim
TEA1781T; TEA1782T
increasing prim
WND_SEC_1
Figure
GreenChip PC secondary control ICs
14.
is high after SB is turned on.
© NXP B.V. 2009. All rights reserved.
closed
open
V
0
closed
open
"1"
"0"
"1"
"0"
V
INDC
rst
WND_SEC_1
/ N
014aaa194
/ N
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