tda4855 NXP Semiconductors, tda4855 Datasheet - Page 21

• Manufacturer Part Number: tda4855
• Description: Autosync Deflection Controller Asdc
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Notes to the characteristics
1. For duration of vertical blanking pulse see characteristics of “Vertical oscillator (oscillator frequency in application
2. Continuous blanking at CLBL (pin 16) will be activated, if one of the following conditions is true:
3. To ensure safe locking of the horizontal oscillator, one of the following procedures is required:
4. Loading of HPLL1 (pin 26) is not allowed.
5. Oscillator frequency is f
6. Voltage at HPLL1 (pin 26) is fed to HBUF (pin 27) via a buffer. Disturbances caused by horizontal sync are removed
7. Input resistance at HPOS (pin 30):
8. Full vertical sync range with constant amplitude (f
9. If higher vertical frequencies are required, sync range can be shifted by using a smaller capacitor at VCAP (pin 24).
10. Value of resistor at VREF (pin 23) may not be changed.
11. All vertical and EW adjustments are specified at nominal vertical settings, which means:
12. VGA presets are enabled below the horizontal frequency at which the current ratio I
13. The superimposed logarithmic sawtooth at VSCOR (pin 19) tracks with internal VGA settings and with VPOS, but
14. The output signal at EWDRV (pin 11) may consist of parabola + DC shift + trapezium correction. These adjustments
1996 Jul 18
Autosync Deflection Controller (ASDC)
without adjustment of free-running frequency fv(o))”.
a) No horizontal flyback pulses at HFLB (pin 1) within a line
b) X-ray protection is triggered
c) Voltage at HPLL2 (pin 31) is low (for soft start of horizontal drive)
d) Supply voltage at V
e) PLL1 unlocked while frequency-locked loop is in search mode.
a) Search mode starts always from f
b) Search mode starts either from f
c) After locking is achieved, HPOS can be operated in the normal way.
by an internal sample-and-hold circuit.
application with adjustment of free-running frequency.
a)
b)
c)
d) VGA presets disabled (current ratio I
e) f
specified value.
not with VAMP settings. The superimposed waveform is described by
depth of a sawtooth from
external long-tailed pair (see Fig.17).
have to be carried out in a correct relationship to each other in order to avoid clipping due to the limited output voltage
range at EWDRV.
ground in parallel with an 8.2 k resistor in series with a 47 nF capacitor.
components are a 1.5 nF capacitor from pin 26 to ground in parallel with a 27 k resistor in series with a 47 nF
capacitor.
H
VAMP = 100% (I
VSCOR = 0 (pin 19 open-circuit)
VPOS centred (pin 17 forced to ground)
= 70 kHz.
VAMP
CC
min
(pin 9) is low
5
when no sync input signal is present (no continuous blanking at pin 16).
= 135 A)
6
to +
5
6
R
min
. A linear sawtooth with the same modulation depth can be recovered in an
min
HPOS
or f
. Then the PLL1 filter components are a 3.3 nF capacitor from pin 26 to
HBUF
max
=
: I
kT
----- -
q
with HPOS in middle position (I
HREF
V(min)
-------------- -
I
HPOS
1
21
2.25)
: f
V(max)
= 1 : 2.5) can be made usable by choosing an
kT
------ -
q
In
HPOS
------------ -
1
1 d
+
–
d
= 60 A). Then the PLL1 filter
HBUF
with ‘d’ being the modulation
: I
Preliminary specification
HREF
exceeds the
TDA4855