pnx8526 NXP Semiconductors, pnx8526 Datasheet - Page 39

• Manufacturer Part Number: pnx8526
• Description: Programmable Source Decoder With Integrated Peripherals
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 15101
Product data sheet
The DV inputs support parallel transport stream formats. In addition, a single incoming
1394 transport stream is supported. Two selected transport streams can undergo internal
de-scrambling and decoding.
Based on the system implementation, one or both transport streams may pass through
Point Of Deployment (POD) or Common Interface (CI) conditional access modules before
transfer into the PNX8526. Either a single companion IC, such as the SCM microsystems
CIMaX, or two CIMaX chips can be used. In the latter case, it is possible to handle dual
decoding no matter which conditional access system is used.
The PNX8526 contains on-chip DVB, MULTI2 and DES hardware de-scramblers, as well
as an ICAM verifier. The entitlement system for these de-scramblers is provided via two
smart card interfaces.
The TM32 CPU does further processing on the result of the transport stream
demultiplexing.
For MPEG-2 video, a slice level HL MPEG-2 video decoder performs the majority of the
MPEG-2 algorithm. This MPEG decoder is capable of full-resolution decoding. The
TM32 CPU does all MPEG-2 processing above the slice level. Two simultaneous SD
streams or one HD stream may be processed.
All audio processing is done by the TM32 CPU. Compressed audio will be present in
memory from either the transport stream de-multiplex or from the SPDIF input port. The
SPDIF input port is intended primarily for DTV applications where a SPDIF source is
available from an external source device, such as a DVD player. PCM (stereo sample)
audio is present in memory from the I
equivalent) compressed audio streams may be decoded simultaneously. The TM32 CPU
may also process effects, enhancements and mix the audio data. Multi-channel
compressed audio or down-mixed stereo PCM audio is transmitted over the SPDIF output
interface. Multi-channel audio samples are Dolby Pro Logic down-mixed into the two
stereo I
inputs and two I
connection of other audio inputs or outputs - headphones, for example. Note that there is
not enough compute power to support encoding of multi-channel compressed audio
simultaneous with video processing. So the multi-channel compressed audio transmitted
over SPDIF must be from one of the original compressed sources.
Graphics rendering may be accomplished with the MIPS or the TM32 CPU by utilizing the
2D drawing and DMA engine. This engine can perform fast area fills, 3-operand bitblt,
monochrome data expansion, and lines. It can also be used as a generic DMA engine to
transfer data between memory locations on a byte-aligned basis. An alpha bitblt capability
is also provided to allow for anti-aliased text and lines as well as source/destination
blending operations.
Once all video and graphics data for specific fields or frames has been generated in
memory, the video display pipeline starts processing those images for display. The video
processing functions include 6-tap horizontal/vertical scaling, anti-flicker filtering, and
de-interlacing (when progressive output is required). The processed images are then
combined for each output. Up to four surfaces of any supported format may be combined
to produce the primary display output. Up to two surfaces are combined to produce the
2
S-bus interfaces to the PNX8510 companion IC. In addition to the two I
2
S-bus outputs, a bidirectional I
Rev. 02 — 11 July 2005
Programmable source decoder with integrated peripherials
2
S-bus input ports or SPDIF input. Two AC-3 (or
2
S-bus interface is provided. This allows
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
PNX8526
2
S-bus
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