pnx8510 NXP Semiconductors, pnx8510 Datasheet - Page 37

• Manufacturer Part Number: pnx8510
• Description: Analog Companion Chip
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 12612
Product data
7.6 Clock module
Table 25:
All of the PNX8510/11 modules receive their input clocks from the clocks module. The
top level structure of the clocks module is
The PNX8510/11 in normal operation mode receives four external clocks. Two clocks
dv_clk1 and dv_clk2 are the clocks used for the primary and secondary video data
paths. The other two clocks assemble the audio over-sampling clocks for the primary
and secondary audio channel.
Signal
gpio4_out1
gpio4_out2
gpio4_in3
gpio3_out1
gpio3_out2
gpio3_in1
gpio3_in2
gpio3_in3
gpio2_out1
gpio2_out2
gpio2_in3
gpio1_out1
gpio_in3
Fig 28. Clocks module
Specific GPIO assignments
Description
Data request secondary encoder
Composite sync primary encoder
30-bit parallel video input mode: bit[0] = red channel
Enable y secondary encoder (1/2 of the encoder operation frequency)
Odd/even signal primary encoder
Real time control input primary encoder
Real time control input secondary encoder
30-bit parallel video input mode: bit[1] = green channel
Odd/even signal secondary encoder
Data request primary encoder
30-bit parallel video input mode: bit[0] = green channel
Vertical sync secondary encoder
30-bit parallel video input mode: bit[0] = blue channel
i2s_aos1_clk
i2s_aos2_clk
Rev. 04 – 12 January 2004
dv_clk1
dv_clk2
All other settings are reserved for future use
CLOCKS_VIDEO_SUB_1
CLOCKS_VIDEO_SUB_2
CLOCKS_AUDIO_SUB_1
CLOCKS_AUDIO_SUB_2
I
2
C-BUS DECODER
…continued
MODULE
Figure
28.
MDB656
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
clk_dv1_if
clk_dv1_proc
clk_dv2_if
clk_dv2_proc
sclk_a1
ws_a1
sclk_a2
ws_a2
PNX8510/11
Analog companion chip
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