m95512 STMicroelectronics, m95512 Datasheet - Page 15

• Manufacturer Part Number: m95512
• Description: 512kbit Serial Spi Bus Eeprom With High Speed Clock
• Manufacturer: STMicroelectronics

Write Status Register (WRSR)
The Write Status Register (WRSR) instruction al-
lows new values to be written to the Status Regis-
ter. Before it can be accepted, a Write Enable
(WREN) instruction must previously have been ex-
ecuted. After the Write Enable (WREN) instruction
has been decoded and executed, the device sets
the Write Enable Latch (WEL).
The Write Status Register (WRSR) instruction is
entered by driving Chip Select (S) Low, followed
by the instruction code and the data byte on Serial
Data Input (D).
The instruction sequence is shown in
The Write Status Register (WRSR) instruction has
no effect on b6, b5, b4, b1 and b0 of the Status
Register. b6, b5 and b4 are always read as 0.
Figure 11. Write Status Register (WRSR) Sequence
S
C
D
Q
0
1
High Impedance
2
Instruction
3
Figure
4
5
11..
6
7
MSB
7
8
6
Chip Select (S) must be driven High after the rising
edge of Serial Clock (C) that latches in the eighth
bit of the data byte, and before the next rising edge
of Serial Clock (C). Otherwise, the Write Status
Register (WRSR) instruction is not executed. As
soon as Chip Select (S) is driven High, the self-
timed Write Status Register cycle (whose duration
is t
cycle is in progress, the Status Register may still
be read to check the value of the Write In Progress
(WIP) bit. The Write In Progress (WIP) bit is 1 dur-
ing the self-timed Write Status Register cycle, and
is 0 when it is completed. When the cycle is com-
pleted, the Write Enable Latch (WEL) is reset.
9 10 11 12 13 14 15
5
W
Register In
) is initiated. While the Write Status Register
4
Status
3
2
1
0
AI02282D
M95512
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