tmp89ch42 TOSHIBA Semiconductor CORPORATION, tmp89ch42 Datasheet - Page 13
tmp89ch42
Manufacturer Part Number
tmp89ch42
Description
8 Bit Microcontroller Tlcs-870/c1 Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP89CH42.pdf
(342 pages)
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19. Key-on Wakeup (KWU)
20. 10-bit AD Converter (ADC)
18.4 Functions..............................................................................................................................276
18.5 Data Transfer of I2C Bus.....................................................................................................286
18.6 AC Specifications................................................................................................................293
18.7 Revision History..................................................................................................................295
19.1 Configuration.......................................................................................................................297
19.2 Control.................................................................................................................................298
19.3 Functions..............................................................................................................................299
20.1 Configuration.......................................................................................................................301
20.2 Control.................................................................................................................................302
20.3
20.4
20.5 Starting STOP/IDLE0/SLOW Modes.................................................................................308
20.6 Analog Input Voltage and AD Conversion Result..............................................................309
20.7 Precautions about the AD Converter...................................................................................310
20.8 Revision History..................................................................................................................311
18.4.1
18.4.2
18.4.3
18.4.4
18.4.5
18.4.6
18.4.7
18.4.8
18.4.9
18.4.10
18.4.11
18.4.12
18.4.13
18.4.14
18.4.15
18.5.1
18.5.2
18.5.3
18.5.4
18.5.5
20.3.1
20.3.2
20.3.3
20.7.1
20.7.2
20.7.3
18.4.3.1
18.4.3.2
18.4.4.1
18.4.4.2
18.5.3.1
18.5.3.2
Functions.............................................................................................................................306
Register Setting...................................................................................................................308
Low Power Consumption Function...............................................................................................................................276
Selecting the slave address match detection and the GENERAL CALL detection.......................................................276
Selecting the number of clocks for data transfer and selecting the acknowledgement or non-acknowledgment mode......
Serial clock....................................................................................................................................................................278
Master/slave selection....................................................................................................................................................280
Transmitter/receiver selection........................................................................................................................................280
Start/stop condition generation......................................................................................................................................280
Interrupt service request and release..............................................................................................................................281
Setting of serial bus interface mode...............................................................................................................................282
Device initialization.......................................................................................................................................................286
Start condition and slave address generation.................................................................................................................286
1-word data transfer.......................................................................................................................................................287
Stop condition generation..............................................................................................................................................290
Restart............................................................................................................................................................................291
Single mode...................................................................................................................................................................306
Repeat mode..................................................................................................................................................................306
AD operation disable and forced stop of AD operation................................................................................................307
Analog input pin voltage range......................................................................................................................................310
Analog input pins used as input/output ports.................................................................................................................310
Noise countermeasure....................................................................................................................................................310
276
Software reset..............................................................................................................................................................282
Arbitration lost detection monitor................................................................................................................................282
Slave address match detection monitor.......................................................................................................................284
GENERAL CALL detection monitor..........................................................................................................................284
Last received bit monitor.............................................................................................................................................285
Slave address and address recognition mode specification.........................................................................................285
Number of clocks for data transfer
Output of an acknowledge signal
Clock source
Clock synchronization
When SBI0SR2<MST> is "1" (Master mode)
When SBI0SR2<MST> is "0" (Slave mode)
vii
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